INTCON

Interrupt Control Register
Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Interrupt Enable (GIE) bit. User software needs to ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature allows for software polling.
Name:
INTCON
Offset:
0x000B
Reset:
Access:
Bit76543210
GIEPEIEINTEDG
AccessR/WR/WR/W
Reset001

Bit 7 – GIE: Global Interrupt Enable

Global Interrupt Enable

ValueDescription
1 Enables all active interrupts
0 Disables all interrupts

Bit 6 – PEIE: Peripheral Interrupt Enable

Peripheral Interrupt Enable

ValueDescription
1 Enables all active peripheral interrupts
0 Disables all peripheral interrupts

Bit 0 – INTEDG: External Interrupt Edge Select

External Interrupt Edge Select

ValueDescription
1 Interrupt on rising edge of INT pin
0 Interrupt on falling edge of INT pin