TMR0H
Timer0 Period/Count High Register
Name:
TMR0H
Offset:
0x059D
Reset:
Access:
Bit
7
6
5
4
3
2
1
0
TMR0H[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
Bits 7:0 – TMR0H[7:0]: TMR0 Most Significant Counter
TMR0 Most Significant Counter
Value
Name
Description
0 to 255
MD16
=
0
8-bit Timer0 Period Value. TMR0L continues counting from 0 when this value is reached.
0 to 255
MD16
=
1
16-bit Timer0 Most Significant Byte