Register Summary - Memory
Organization
Offset |
Name |
Bit Pos. |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
0x00 |
INDF0 |
7:0 |
INDF0[7:0] |
0x01 |
INDF1 |
7:0 |
INDF1[7:0] |
0x02 |
PCL |
7:0 |
PCL[7:0] |
0x03 |
STATUS |
7:0 |
|
|
|
TO |
PD |
Z |
DC |
C |
0x04 |
FSR0 |
7:0 |
FSR0[7:0] |
15:8 |
FSR0[15:8] |
0x06 |
FSR1 |
7:0 |
FSR1[7:0] |
15:8 |
FSR1[15:8] |
0x08 |
BSR |
7:0 |
|
|
BSR[5:0] |
0x09 |
WREG |
7:0 |
WREG[7:0] |
0x0A |
PCLATH |
7:0 |
|
PCLATH[6:0] |