External Oscillator Failure Detector

When using external crystals or external clock sources, there is always a slight probability of the source failing. As a safety precaution, the XMEGA Clock System has an External Oscillator Failure Detector that monitors the external clock source and reacts if it stops.

If the external source is selected as the main system clock source and it fails, the failure detector switches to the internal 2MHz RC oscillator and issues a Non-maskable Interrupt (NMI). Refer to the application note “AVR1305: XMEGA Interrupts and the Programmable Multilevel Interrupt Controller” for more details on NMIs.

If the external source is enabled, but is not selected as the main system clock source, the external source will only be disabled, but the NMI will still be issued.

The failure detector uses the ULP oscillator to monitor the external source, and reacts if the frequency falls below 32kHz. Note that the ULP accuracy is 30%, so it could be possible to run below 32kHz, but it is not recommended. 32kHz operation is guaranteed not to cause a failure detection.

The failure detector is not enabled by default. To avoid accidental enabling, a special sequence is required to enable it. The procedure is as follows:

  1. 1.Load the Protect I/O Register signature (byte value 0xD8) into the Configuration Change Protection register (CCP). This will automatically disable all interrupts for the next four CPU instruction cycles.
  2. 2.Set the Failure Detection Enable bit (XOSCFDEN) in the External Oscillator Failure Detection register (OSC.XOSCFAIL) to logic one.
  3. 3.The failure detector is now enabled until the next system reset.

Since the failure detector issues a Non-maskable Interrupt if the external source fails when used as the main system clock source, it is important to implement an interrupt handler for this interrupt. Non-maskable interrupts cannot be disabled in any way, hence the name “Non-maskable”. Study the example software for details.