To provide flexible options for the main system clock, the XMEGA Clock System contains a MUX that selects one of the clock sources or the PLL. It feeds the selected clock through a highly configurable prescaler block that can divide the clock signal by a factor from 1 to 2048 before it is routed to the CPU and peripherals. It can also provide clock signals two and four times the CPU clock frequency for peripherals that operate at a higher frequency than the CPU, for instance the EBI module that can operate at twice the CPU frequency.
The figure below illustrates the MUX and prescalers. The output from the MUX goes through three prescaler stages. The first stage, prescaler A, can divide by a factor of 1 to 512. Then prescalers B and C can be configured to either pass the signal through or divide by up to four combined. See the datasheet for details on this restriction. Prescaler C output is routed to the CPU and peripherals.
The default setup after a reset is to select the internal 2MHz RC oscillator and pass the clock signal undivided through all three prescalers. Prescaler A can be used to lower the system frequency by a large factor in order to reduce power consumption, while prescaler B and C is primarily intended to provide clock signals one, two, or four times the CPU frequency to selected peripherals.
The prescaler settings can be changed safely at any time. The hardware will ensure a glitch-free transition between frequencies. When changing clock sources, hardware will prevent any attempts to change to an unstable clock source.
The procedure for changing system clock and prescalers is as follows:
- 1.Load the Protect I/O Register signature (byte value 0xD8) into the Configuration Change Protection register (CCP). This will automatically disable all interrupts for the next four CPU instruction cycles.
- 2.Set the desired configuration for the prescaler or the system clock.