Wrong Duty Cycle for CCP Module

While in PWM mode and the Timer2 prescaler is configured to 1:1, the duty cycle of the PWM output is as expected. When the Timer2 prescaler is changed to a value other than 1:1, while T2PR = 0 (PWM resolution of two bits), the expected duty cycle is wrong. The corrected duty cycle values are shown in the table below.

Table 1. Corrected Duty Cycle Values
Prescaler/CCPR 0 1 2 3 4
1:1 0% 25% 50% 75% 100%
1:2 50% 75% 50% 75% 100%
1:4...1:128 75% 75% 75% 75% 100%

Work around

None.

Affected Silicon Revisions

A2 A3
X X