Target Connection Pinout

The table below shows the pinout of the target end of the cable connected from the MPLAB ICE 4 unit to either an adapter board or a 40-pin connector on the target board.

Table 1. Emulator Connector Pin Functions on Target
Pin Description Function(s) Pin Description Function(s)
1 CS- A Power Monitor 2 CS+ A Power Monitor
3 CS- B Power Monitor 4 CS+ B Power Monitor
5 UTIL SDA Reserved 6 UTIL SCL Reserved
7 DGI SPI nCS DGI SPI nCS,PORT6, TRIG6 8 DGI SPI SCK DGI SPI SCK, SPI SCK, PORT7, TRIG7
9 DGI SPI MOSI DGI SPI MOSI, SPI DATA, PORT5, TRIG5 10 DGI SPI MISO DGI SPI MISO, PORT4, TRIG4
11 3V3 Reserved 12 GND GND
13 DGI GPIO3 DGI GPIO3, PORT3, TRIG3 14 TRCLK TRCLK, TRACECLK,
15 DGI GPIO2 DGI GPIO2, PORT2, TRIG2 16 GND GND
17 DGI GPIO1 DGI GPIO1, PORT1, TRIG1 18 TRDAT3 TRDAT3, TRACEDATA(3)
19 DGI GPIO0 DGI GPIO0, PORT0, TRIG0 20 GND GND
21 5V0 Reserved 22 TRDAT2 TRDAT2, TRACEDATA(2)
23 DGI VCP RXD DGI RXD, CICD RXD, VCD RXD 24 GND GND
25 DGI VCP TXD DGI TXD, CICD TXD, VCD TXD 26 TRDAT1 TRDAT1, TRACEDATA(1)
27 DGI I2C SDA DGI I2C SDA 28 GND GND
29 DGI I2C SCL DGI I2C SCL 30 TRDAT0 TRDAT0, TRACEDATA(0)
31 TVDD PWR TVDD PWR 32 GND GND
33 TDI IO TDI IO, TDI, MOSI 34 TMS IO TMS IO, SWD IO, TMS
35 TPGC IO TPGC IO, TPGC, SWCLK, TCK, SCK 36 TAUX IO TAUX IO, AUX, DW, RESET
37 TVPP IO TVPP/MCLR, nMCLR, RST 38 TPGD IO TPGD IO, TPGD, SWO,TDO, MISO, DAT
39 TVDD PWR TVDD PWR 40 TVDD PWR TVDD PWR