Since it contains an early version of the OCD module, ATmega128[A] does not
support the use of the BREAK instruction for software breakpoints.
The target clock frequency must be accurately specified in the software front-end before starting a debug session. For synchronization reasons, the JTAG TCK signal must be less than one fourth of the target clock frequency for reliable debugging. When programming via the JTAG interface, the TCK frequency is limited by the maximum frequency rating of the target device, and not the actual clock frequency being used.
When using the internal RC oscillator, be aware that the frequency may vary from device to device and is affected by temperature and VCC changes. Be conservative when specifying the target clock frequency.
To be able to debug a megaAVR device the OCDEN fuse must be programmed (by default OCDEN is unprogrammed). This allows access to the OCD in order to facilitate debugging the device. The software front-end will always ensure that the OCDEN fuse is programmend when starting a debug session and is left unprogrammed when terminating the session, thereby restricting unnecessary power consumption by the OCD module.
The JTAG interface is enabled using the JTAGEN fuse, which is programmed by default. This allows access to the JTAG programming interface.
If the JTAGEN fuse is programmed, the JTAG interface can still be disabled in firmware by setting the JTAG disable bit in the MCU Control Register. This will render code un-debuggable, and should not be done when attempting a debug session. If such code is already executing on the Microchip AVR device when starting a debug session, the Power Debugger will assert the RESET line while connecting. If this line is wired correctly, it will force the target AVR device into Reset, thereby allowing a JTAG connection.
If the JTAG interface is enabled, the JTAG pins cannot be used for alternative pin functions. They will remain dedicated JTAG pins until either the JTAG interface is disabled by setting the JTAG disable bit from the program code, or by clearing the JTAGEN fuse through a programming interface.
Be sure to check the “use external reset” checkbox in both the programming dialog and debug options dialog in Atmel Studio in order to allow the Power Debugger to assert the RESET line and re-enable the JTAG interface on devices which are running code which disables the JTAG interface by setting the JTAG disable bit.
The IDR (In-out Data Register) is also known as the OCDR (On-Chip Debug Register), and is used extensively by the debugger to read and write information to the MCU when in Stopped mode during a debug session. When the application program in Run mode writes a byte of data to the OCDR register of the AVR device being debugged, the Power Debugger reads this value out and displays it in the message window of the software front-end. The OCDR register is polled every 50ms, so writing to it at a higher frequency will NOT yield reliable results. When the AVR device loses power while it is being debugged, spurious OCDR events may be reported. This happens because the Power Debugger may still poll the device as the target voltage drops below the AVR’s minimum operating voltage.