TWI (Slave) Address Register
The TWAR should be loaded with the 7-bit Slave address (in the seven most significant bits of TWAR) to which the TWI will respond when programmed as a Slave Transmitter or Receiver, and not needed in the Master modes. In multi master systems, TWAR must be set in masters which can be addressed as Slaves by other Masters.
The LSB of TWAR is used to enable recognition of the general call address (0x00). There is an associated address comparator that looks for the slave address (or general call address if enabled) in the received serial address. If a match is found, an interrupt request is generated.
| Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TWA[6:0] | TWGCE | ||||||
| AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Reset1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
TWI (Slave) Address
These seven bits constitute the slave address of the TWI unit.
TWI General Call Recognition Enable Bit
If set, this bit enables the recognition of a General Call given over the 2-wire Serial Bus.