Power Reduction Register

Name:
PRR
Offset:
0x64
Reset:
0x00
Access:
-
Bit76543210
PRTWIPRTIM2PRTIM0PRTIM1PRSPIPRUSARTPRADC
AccessR/WR/WR/WR/WR/WR/WR/W
Reset0000000

Bit 7 – PRTWI: Power Reduction TWI

Power Reduction TWI

Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When waking up the TWI again, the TWI should be re initialized to ensure proper operation.

Bit 6 – PRTIM2: Power Reduction Timer/Counter2

Power Reduction Timer/Counter2

Writing a logic one to this bit shuts down the Timer/Counter2 module in synchronous mode (AS2 is 0). When the Timer/Counter2 is enabled, operation will continue like before the shutdown.

Bit 5 – PRTIM0: Power Reduction Timer/Counter0

Power Reduction Timer/Counter0

Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0 is enabled, operation will continue like before the shutdown.

Bit 3 – PRTIM1: Power Reduction Timer/Counter1

Power Reduction Timer/Counter1

Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1 is enabled, operation will continue like before the shutdown.

Bit 2 – PRSPI: Power Reduction Serial Peripheral Interface

Power Reduction Serial Peripheral Interface

If using debugWIRE On-chip Debug System, this bit should not be written to one. Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to the module. When waking up the SPI again, the SPI should be re initialized to ensure proper operation.

Bit 1 – PRUSART: Power Reduction USART

Power Reduction USART

Writing a logic one to this bit shuts down the USART by stopping the clock to the module. When waking up the USART again, the USART should be re initialized to ensure proper operation.

Bit 0 – PRADC: Power Reduction ADC

Power Reduction ADC

Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down. The analog comparator cannot use the ADC input MUX when the ADC is shut down.