Alternate Functions of Port B

The Port B pins with alternate functions are shown in the table below:

Table 1. Port B Pins Alternate Functions
Port Pin Alternate Functions
PB7

XTAL2 (Chip Clock Oscillator pin 2)

TOSC2 (Timer Oscillator pin 2)

PCINT7 (Pin Change Interrupt 7)

PB6

XTAL1 (Chip Clock Oscillator pin 1 or External clock input)

TOSC1 (Timer Oscillator pin 1)

PCINT6 (Pin Change Interrupt 6)

PB5

SCK (SPI Bus Master clock Input)

PCINT5 (Pin Change Interrupt 5)

PB4

MISO (SPI Bus Master Input/Slave Output)

PCINT4 (Pin Change Interrupt 4)

PB3

MOSI (SPI Bus Master Output/Slave Input)

OC2A (Timer/Counter2 Output Compare Match A Output)

PCINT3 (Pin Change Interrupt 3)

PB2

SS (SPI Bus Master Slave select)

OC1B (Timer/Counter1 Output Compare Match B Output)

PCINT2 (Pin Change Interrupt 2)

PB1

OC1A (Timer/Counter1 Output Compare Match A Output)

PCINT1 (Pin Change Interrupt 1)

PB0

ICP1 (Timer/Counter1 Input Capture Input)

CLKO (Divided System Clock Output)

PCINT0 (Pin Change Interrupt 0)

The alternate pin configuration is as follows:

If PB7 is used as a clock pin, DDB7, PORTB7 and PINB7 will all read 0.

If PB6 is used as a clock pin, DDB6, PORTB6 and PINB6 will all read 0.

Table 2 and Table 3 relate the alternate functions of Port B to the overriding signals shown in Figure 1. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.

Table 2. Overriding Signals for Alternate Functions in PB7...PB4
Signal
Name PB7/XTAL2/TOSC2/PCINT7(1) PB6/XTAL1/TOSC1/PCINT6(1) PB5/SCK/PCINT5 PB4/MISO/PCINT4
PUOE INTRCEXTCK+ AS2 INTRC + AS2 SPE • MSTR SPE • MSTR
PUOV 0 0 PORTB5 • PUD PORTB4 • PUD
DDOE INTRCEXTCK+ AS2 INTRC + AS2 SPE • MSTR SPE • MSTR
DDOV 0 0 0 0
PVOE 0 0 SPE • MSTR SPE • MSTR
PVOV 0 0 SCK OUTPUT SPI0SLAVE
OUTPUT
DIEOE INTRCEXTCK + AS2 + PCINT7 • PCIE0 INTRC + AS2 + PCINT6 • PCIE0 PCINT5 • PCIE0 PCINT4 • PCIE0
DIEOV (INTRC + EXTCK) • AS2 INTRC • AS2 1 1
DI PCINT7 INPUT PCINT6 INPUT

PCINT5 INPUT

SCK INPUT

PCINT4 INPUT
SPI MSTR INPUT

AIO Oscillator Output Oscillator/Clock Input
Note:
  1. 1.INTRC means that one of the internal RC Oscillators are selected (by the CKSEL fuses), EXTCK means that external clock is selected (by the CKSEL fuses).
Table 3. Overriding Signals for Alternate Functions in PB3...PB0
Signal 
Name PB3/MOSI/OC2A/PCINT3 PB2/SS/OC1B/PCINT2 PB1/OC1A/PCINT1 PB0/ICP1/CLKO/PCINT0
PUOE SPE • MSTR SPE • MSTR 0 0
PUOV PORTB3 • PUD PORTB2 • PUD 0 0
DDOE SPE • MSTR SPE • MSTR 0 0
DDOV 0 0 0 0
PVOE SPE • MSTR + OC2A ENABLE OC1B ENABLE OC1A ENABLE 0
PVOV SPI MSTR OUTPUT + OC2A OC1B OC1A 0
DIEOE PCINT3 • PCIE PCINT2 • PCIE0 PCINT1 • PCIE0 PCINT0 • PCIE0
DIEOV 1 1 1 1
DI

PCINT3 INPUT
SPI SLAVE INPUT

PCINT2 INPUT

SPI SS

PCINT1 INPUT

PCINT0 INPUT

ICP1 INPUT

AIO