Lock Bits Access

To protect memory contents from being accidentally overwritten, or from unauthorized reading, the Lock bits can be set to protect the memory contents. As shown in the table below, the memories can either be protected from further writing, or you may completely disable both reading and writing of memories on the chip.

In some devices the Lock bits cannot be read, and setting Lock bits can not be verified by the programmer. To check that the Lock bits have been properly set in these devices, one should attempt to alter a location in EEPROM. When Lock bit 1 is set, memory locations are not altered. When both Lock bits 1 and 2 are set, no location can be read, and the result returned will be the Low byte of the address passed in the command. Setting only Lock bit 2 will have no protective effect. Before the chip is protected from reading, it has to be successfully protected from writing.

The Lock bits will only prevent the programming interface from altering memory contents. The core can read the Flash program memory and access the EEPROM as usual, independent of the Lock bit setting.

Table 1. Lock Bits Protection Modes
Lock bit 1 Lock bit 2 Protection type
1 1 No Memory Lock
0 1 Further Programming of both Flash and EEPROM Disabled
0 0 Further Programming and Verification of both Flash and EEPROM Disabled

The only method to regain access to the memory after setting the lock bits, is by erasing the entire chip with a “Chip Erase” command. The lock bits will be cleared to 1, disabling the protection, only following a successful clearing of all memory locations.

On Chip Erase, the Lock bits obtain the value 1, indicating the bit is cleared. Although the operation of enabling the protection is referred to as “setting” the Lock bit, a zero value should be written to the bit to enable protection.

Table 2. Example, Setting Lock Bit 1 to Disable Further Programming
Action MOSI, sent to the target AVR MISO, returned from the target AVR
Set Lock Bit 1, Disable Programming $AC FD xx yy $zz AC FD xx
Wait N ms