On the AVR UC3 L0 series, the RESET_N pin is used to enable/disable the JTAG interface or the aWire interface. For this reason, the RESET_N pin should not be connected to an external reset circuit to avoid drive contention and speed problems. To avoid this issue with the RST pushbutton, the 0Ω R36 resistor is not mounted by default.
On the AVR UC3 L0 series, the JTAG TMS, TDI, TDO, and TCK pins are multiplexed with I/O lines. While using these multiplexed JTAG lines, all normal peripheral activity on these lines is disabled. The user must make sure that no external peripheral is blocking the JTAG lines while debugging.
Conflict conditions over the debugging pins, highlights the components on the AT32UC3L-EK that might interfere with the multiplexed JTAG pins. These components must not be used while debugging with the JTAG interface. Another way to say this is that debugging over the JTAG interface will not work if there is any external signal activity over these components.
| QFP48 pin | GPIO | Conflict conditions |
|---|---|---|
| 11 | PA00 | If the WLESS J8 connector is configured with a jumper on J44.3-5, signal activities over J8.1 will conflict with JTAG.TCK |
| 14 | PA01 | If the WLESS J8 connector is configured with a jumper on J44.4-6, signal activities over J8.2 will conflict with JTAG.TMS |
| 13 | PA02 | No possible conflicts with JTAG.TDO |
| 4 | PA03 |
|
| 22 | N.A. | If the 0Ω R36 resistor is mounted, the effect of C4 will conflict with the RESET_N pin |
To summarize, debugging will not work if:
The WLESS connector is used
The Power-Off signal is enabled by hardware (refer to Section Hardware Configurations) and the software running on the AT32UC3L064 toggles PA03