AXI Transactions

The following timing diagrams illustrate the operation of the DDR controller with the AXI interface. The Micron DDR3 16-bit memory model is used to perform the read and write transactions.

Figure 1. AXI Single Write Transaction
Figure 2. AXI Burst Write Transaction (INCR-2)
Figure 3. AXI Single Read Transaction
Figure 4. AXI Burst Read Transaction (INCR-2)