The routing board signals from FPGA to QDR II+ or QDR II+ Extreme devices, adhere to the constraints mentioned in the following tables.
Signal | Maximum Length (inches) | Routing Delay (ns) |
---|---|---|
Address and Command | 6.0 | 1 |
Data | 6.0 | 1 |
Signal | Skew Constraints |
---|---|
Data to Clock (D to K and Q to CQP) |
±25 ps |
Data Bus (D or Q) | ±25 ps |
Address and Command | ±25 ps |
Address, Command and to Clock (KP) | ±25 ps |
KP to KN | ±10 ps |