Configuring the Fabric DDR Subsystem

The Fabric DDR subsystem macro (DDR3, DDR4, and LPDDR3) located in the Libero IP catalog must be instantiated in SmartDesign to access the DDR memory from the FPGA fabric through the subsystem. The DDR Configurator, shown in Figure 1, configures the DDR subsystem. It supports the following modes:

The following sections describe the configuration options available in the DDR Configurator.