5 Access Port(s)

This section describes the Memory Access Port (MEM-AP) used to access the device memory. The debugger accesses the MEM-AP once access to Serial Wire Debug Port (SW-DP) is enabled. When the device security bit is cleared, 2 MEM-AP (AP0 and AP1) are accessible on those devices. The second AP may be used for non-intrusive debugging.

Even if it is not mandatory for this device, before accessing a MEM-AP, the debugger can wait for the CSW.DeviceEn bit to be set. A coresight ROM-table is attached to each AP, describing the available debug components. Alternatively, the debugger can rely on the DSU device ID to determine which debug components are available on the device.