12.10.15 PIR6
Note: Interrupt flag bits are set when an
Interrupt condition occurs, regardless of the state of its corresponding enable bit or
the Global Enable (GIE) bit. User software may ensure the appropriate interrupt flag
bits are cleared before enabling an interrupt.
Name: | PIR6 |
Offset: | 0x0092 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ZCDIF | ADTIF | ADIF | |||||||
Access | R/W/HS | R/W/HS | R/W/HS | ||||||
Reset | 0 | 0 | 0 |
Bit 2 – ZCDIF Zero-Cross Detect (ZCD) Interrupt Flag
Value | Description |
---|---|
1 | A ZCD interrupt occurred (must be cleared in software) |
0 | A ZCD interrupt has not occurred |
Bit 1 – ADTIF ADC Threshold Interrupt Flag
Value | Description |
---|---|
1 | ADC Threshold interrupt has occurred (must be cleared in software) |
0 | ADC Threshold interrupt event has not occurred |
Bit 0 – ADIF ADC Interrupt Flag
Value | Description |
---|---|
1 | ADC interrupt has occurred (must be cleared in software) |
0 | ADC interrupt event has not occurred |