33.5 ADCGxA
Note:
Refer to the “Pin Allocation Table” for details about available pins per port.
Name: | ADCGxA |
Offset: | 0x1D2E |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CGA5 | CGA4 | CGA2 | CGA1 | CGA0 | |||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Name: | ADCGxA |
Offset: | 0x1D2E |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CGA5 | CGA4 | CGA2 | CGA1 | CGA0 | |||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
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