42.5 Peripheral Dependencies

Peripheral Name PDEC – Position Decoder
Base Address 0x4200_1C00 (Peripheral Bus C)
NVIC IRQ Index:Source 115 : DIR, ERR, OVF, VLC; 116 : MC0; 117 : MC1
MCLK APB Clock (1) CLK_PDEC_APB, Disabled, APBCMASK.PDEC
GCLK Peripheral Channel Index:Clock Name (2) 31 : GCLK_PDEC
PAC Peripheral Peripheral Identifier (PAC.WRCTRL) 71
DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) n/a
EVSYS Users (EVSYS.USERm) (3) 52-54 : PDEC Input Event x, x=0..2 (PDEC_EVU 0..2) (A,S.,R)
EVSYS Generators (EVSYS.CHANNELn) 97 : Overflow/Underflow (PDEC_OVF) 98 : Error (PDEC_ERR) 99 : Direction (PDEC_DIR) 100 : Velocity (PDEC_VLC) 101,102 : Channel x Compare, x=0..1 (PDEC_MCx)
Note:
  1. Clock Name, Default State, Mask Field.
  2. See GCLK.PCHCTRLm Register, where m = Index.
  3. (A,S,R): A = Asynchronous path, S = Synchronous path, R = Resynchronized path.