55.3 Power Supply

Table 55-7. Power Supply Electrical Specifications
DC CHARACTERISTICS Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating Temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature
Param. No. Symbol Characteristics Min. Typ. Max. Units Conditions
REG_1 VDDCORE_CIN (1) VDDCORE Input Bypass parallel Capacitor pair 3.76 4.7 — µF Bulk Ceramic or solid Tantalum with ESR <0.5Ω.

Min and max represent absolute

values including cap tolerances
80 100 — nF Ceramic XR7 with ESR <0.5Ω
REG_5 VDD_CIN (1) VDD Input Bypass parallel Capacitor pair 8 10 — µF Bulk Ceramic or solid Tantalum with ESR <0.5Ω

Separate BULK capacitor for each VDD
80 100 — nF Ceramic XR7 with ESR <0.5Ω on all VDD pins
REG_9 VREFx_CIN (1) External VREFx Input Bypass parallel Capacitor pair 8 10 — µF Bulk Ceramic or solid Tantalum with ESR <0.5Ω
80 100 — nF Ceramic XR7 with ESR <0.5Ω
REG_13 VBAT_CIN (1) VBAT Input Bypass parallel Capacitor pair 8 10 — µF Bulk Ceramic or solid Tantalum with ESR <0.5Ω
80 100 — nF Ceramic XR7 with ESR <0.5Ω
REG_17 AVDD_CIN (1) AVDD Input Bypass parallel Capacitor pair 8 10 — µF Bulk Ceramic or solid Tantalum with ESR <0.5Ω
80 100 — nF Ceramic XR7 with ESR <0.5Ω
REG_23 AVDD_LEXT (2) AVDD series Ferrite Bead DCR (DC Resistance) — — 0.1 Ω ≥600Ω @ 100 MHz
REG_25 Ferrite Bead current Rating 500 — — mA —
REG_27 VSW_LEXT (3,4,5) Buck Switch Mode Regulator Inductor Inductance

(If LDO Mode not used)

 — 10 — µH Shielded Inductor ONLY (If used in BUCK mode else No Connect)
REG_29 Inductor DCR (DC Resistance) — — 0.36 Ω —
REG_31 Inductor ISAT Rating 500 — — mA —
REG_33 BUCK_PEFF Buck Mode Power Efficiency — 66 — % IOUT = 100 uA
REG_35 — 74 — % IOUT = 100 mA
REG_36 VDDCORE VDDCORE Voltage Range — 1.2 — V CPU Active, cache and prefetch

disabled, executing "while(1)" from Flash
REG_37 VDD VDD Input Voltage Range 1.71 3.3 3.63 V BOD33 Disabled
REG_37A IDDVDD_MAX VDD/AVVD Max Current — — 130 mA I/O pins configured as inputs
REG_39 AVDD AVDD Input Voltage Range 1.71 3.3 3.63 V BOD33 Disabled
REG_41 VBAT VBAT Input Voltage Range 1.71 — 3.63 V BOD33 Disabled
REG_41A IDDVBAT_MAX VBAT Max Current — — 315 µA OSCULP32K, BOD and RTC enabled
REG_43 SVDD_R VDD, AVDD Rise Ramp Rate

to Ensure Internal Power-on Reset Signal

 0.2 — 100 mV/µs Failure to meet this specification may lead to start-up or unexpected behaviors
REG_44 SVDD_F VDD, AVDD Falling Ramp Rate

to Ensure Internal Power-on Reset Signal

 — — 50 mV/µs Failure to meet this specification may cause the device to not detect reset
REG_45 VPOR Power-on Reset 0.97 — 1.64 V VDD Power up/Down (See Param REG_43, VDD Ramp Rate)
REG_47 VBOD33 (6,7) VDD BOD (All modes) 1.46 — 1.56 V

SUPC.BOD33.LEVEL[7:0] = 0x00 (Min Value) ,

SUPC.BOD33.HYST[3:0] = 0x02
1.61 — 1.71

SUPC.BOD33.LEVEL[7:0] = 0x19 (Recommended Value) ,

SUPC.BOD33.HYST[3:0] = 0x02
1.63 — 1.73

SUPC.BOD33.LEVEL[7:0] = 0x1C (Recommended Value) ,

SUPC.BOD33.HYST[3:0] = 0x02
2.95 — 3.12

SUPC.BOD33.LEVEL[7:0] = 0xFF (Max Value) ,

SUPC.BOD33.HYST[3:0] = 0x00
REG_51 VBOD33LEVEL_STEP VBOD33 step size (SUPC.BOD33.LEVEL) — 6 — mV Step Size
REG_52 VBOD33HYST_STEP VBOD33 Hysteresis step size (SUPC.BOD33.HYST) — 6 — mV Step Size
REG_53 TRST External RESET valid active pulse width 1 — — µs Minimum reset active time to guarantee CPU reset
Note:
  1. All bypass caps should be located immediately adjacent to pin(s) and on the same side of the PCB as the MCU. Each primary power supply group VDD, AVDD, VDDCORE and VBAT should have one bulk capacitor and on all power pins everywhere a 100nF bypass cap.
  2. Ferrite Bead ISAT(min) ≥ (IDDANA(max) * 1.15).
  3. User must select either LDO or BUCK Mode. The modes are mutually exclusive.
  4. Buck Inductor ISAT(min) ≥ ((ICAPACITOR + IVDDCORE_MAX) * 1.25) when BUCK mode enabled (shielded inductor only).
  5. Given:

    BUCK VSW output pin impedance = ~4 ohms

    Buck Inductor DCR = ~0.2 ohms (Check Inductor Mfg spec)

    C= VDDCORE Bypass Capacitance

    RVSW = VSW output pin impedance + Buck Inductor DCR

    e = 2.71828

    Recommended Inductor ISAT margin 25%

    VDDCORE bypass bulk capacitor charging current through inductor:

    ICAPACITOR = (VDDCORE / RVSW) e-t/RC where t=0 is worst case

    THEREFORE:

    Inductor ISAT(max) = ((ICAPACITOR + IVDDCORE_PEAK_SURGE) * 1.25) = (((VDDCORE / RVSW) e-t/RC + IVDDCORE_PEAK_SURGE) * 1.25)

    Example:
    • VDDCORE bypass capacitors = 4.7µF + 100nF
    • IVDDCORE_PEAK_SURGE = 120mA
    Inductor ISAT(max) = (((VDDCORE / RVSW) e-t/RC + IVDDCORE_PEAK_SURGE) * 1.25)

    = (((1.2 / 4.2) * 2.71828-(0 / 4.3*4.8µF) + 120mA) * 1.25)

    = (((286mA * 1) + 120mA) * 1.25)

    = ((286mA + 120mA) * 1.25)

    = ~508mA

  6. VBOD(min) = (1.5 + (SUPC.BOD33.LEVEL[7:0] * VBOD33LEVEL_STEP))

    VBOD(max) = (VBOD(min) + (SUPC.BOD33.HYST[3:0] * VBOD33HYST_STEP))

  7. If a hysteresis value is programmed, the following equation must be respected to avoid any overflow on VBOD(max) : LEVEL[7:0] value < 255 - HYST[3:0] value.