26.6.2.1 Initialization
The EIC must be initialized in the following order:
- Enable CLK_EIC_APB.
- Enable GCLK_EIC or CLK_ULP32K when one
of the following configuration is selected:
- The NMI uses edge detection or filtering
- One or more EXTINT uses filtering
- One or more EXTINT uses synchronous edge detection
- One or more EXTINT uses debouncing
GCLK_EIC is used when a frequency higher than 32.768 kHz is required for filtering.
CLK_ULP32K is recommended when power consumption is the priority. For CLK_ULP32K write a '1' to the Clock Selection bit in the Control A register (CTRLA.CKSEL).
- Configure the EIC input sense and filtering by writing the configuration register (CONFIG0 or CONFIG1).
- Optionally, enable the Asynchronous mode.
- Optionally, enable the Debouncer mode.
- Enable the EIC by writing a ‘1’ to CTRLA.ENABLE.
- Wait for synchronization completion (SYNCBUSY.ENABLE = 0).
- If required, configure the NMI by writing the Non-Maskable Interrupt Control register (NMICTRL).
The following bits are enable-protected, that is, it can only be written when the EIC is disabled (CTRLA.ENABLE = 0):
- Clock Selection bit in the Control A register (CTRLA.CKSEL)
The following registers are enable-protected:
- Event Control register (EVCTRL)
- Configuration register (CONFIGn)
- External Interrupt Asynchronous Mode register (ASYNCH26.7.9 External Interrupt Asynchronous Mode)
- Debouncer Enable register (DEBOUNCEN26.7.12 Debouncer Enable)
- Debounce Prescaler register (DPRESCALER26.7.13 Debouncer Prescaler)
The enable-protected bits in the CTRLA register can be written simultaneously when setting CTRLA.ENABLE to '1', but not at the same time as CTRLA.ENABLE is being cleared.
Enable-protection is denoted by the "Enable-Protected" property in the register description.