55.39 PDEC Electrical Specifications

Figure 55-26. Position Decoder (PDEC) Counter Mode Timing Diagram
Figure 55-27. Position Decoder (PDEC) Input Timing Diagrams
Table 55-54. Quadrature Encoder Interface Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
PDEC_1TtPHTPCK high time2/fGCLK_PDEC——nsFCLK_41: Refer to Maximum Clock Frequencies Electrical Specifications
PDEC_3TtPLTPCK low time2/fGCLK_PDEC——ns
PDEC_5TtPPTPCK input period4/fGCLK_PDEC——ns
PDEC_7TCKEXTDLYDelay from External TxCK Clock Edge to counter Increment——4/fGCLK_PDECns
PDEC_11TPDHPosition Decoder Input High Time4/fGCLK_PDEC——ns
PDEC_13TPDLPosition Decoder Input Low Time4/fGCLK_PDEC——ns
PDEC_15TPDINPosition Decoder Input Period8/fGCLK_PDEC——ns
PDEC_21TPDFHFilter Time to Recognize High, with Digital Filter4/fGCLK_PDEC——ns
PDEC_23TPDFLFilter Time to Recognize Low, with Digital Filter4/fGCLK_PDEC——ns
PDEC_24fGCLK_PDECGCLK_PDEC——FCLK_41MHz