44.5 Peripheral Dependencies
| Peripheral Name | TC0 – Timer/Counter 0 |
| Base Address | 0x4000_3800 (Peripheral Bus A) |
| NVIC IRQ Index:Source | 107 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC0_APB, Disabled, APBAMASK.TC0 |
| GCLK Peripheral Channel Index:Clock Name (2) | 9 : GCLK_TC0, GCLK_TC1 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 14 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 44 : Overflow (OVF) 45,46 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 44 : TC0 Input (TC0 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 73 : Overflow (TC0_OVF) 74,75 : Match/Compare x, x=0,1 (TC0_MCx) |
| Peripheral Name | TC1 – Timer/Counter 1 |
| Base Address | 0x4000_3C00 (Peripheral Bus A) |
| NVIC IRQ Index:Source | 108 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC1_APB, Disabled, APBAMASK.TC1 |
| GCLK Peripheral Channel Index:Clock Name (2) | 9 : GCLK_TC0, GCLK_TC1 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 15 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 47 : Overflow (OVF) 48,49 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 45 : TC1 Input (TC1 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 76 : Overflow (TC1_OVF) 77,78 : Match/Compare x, x=0,1 (TC1_MCx) |
| Peripheral Name | TC2 – Timer/Counter 2 |
| Base Address | 0x4101_A000 (Peripheral Bus B) |
| NVIC IRQ Index:Source | 109 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC2_APB, Disabled, APBBMASK.TC2 |
| GCLK Peripheral Channel Index:Clock Name (2) | 26 : GCLK_TC2, GCLK_TC3 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 45 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 50 : Overflow (OVF) 51,52 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 46 : TC2 Input (TC2 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 79 : Overflow (TC2_OVF) 80,81 : Match/Compare x, x=0,1 (TC2_MCx) |
| Peripheral Name | TC3 – Timer/Counter 3 |
| Base Address | 0x4101_C000 (Peripheral Bus B) |
| NVIC IRQ Index:Source | 110 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC3_APB, Disabled, APBBMASK.TC3 |
| GCLK Peripheral Channel Index:Clock Name (2) | 26 : GCLK_TC2, GCLK_TC3 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 46 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 53 : Overflow (OVF) 54,55 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 47 : TC3 Input (TC3 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 82 : Overflow (TC3_OVF) 83,84 : Match/Compare x, x=0,1 (TC3_MCx) |
| Peripheral Name | TC4 – Timer/Counter 4 |
| Base Address | 0x4200_1400 (Peripheral Bus C) |
| NVIC IRQ Index:Source | 111 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC4_APB, Disabled, APBCMASK.TC4 |
| GCLK Peripheral Channel Index:Clock Name (2) | 30 : GCLK_TC4, GCLK_TC5 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 69 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 56 : Overflow (OVF) 57,58 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 48 : TC4 Input (TC4 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 85 : Overflow (TC4_OVF) 86,87 : Match/Compare x, x=0,1 (TC4_MCx) |
| Peripheral Name | TC5 – Timer/Counter 5 |
| Base Address | 0x4200_1800 (Peripheral Bus C) |
| NVIC IRQ Index:Source | 112 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC5_APB, Disabled, APBCMASK.TC5 |
| GCLK Peripheral Channel Index:Clock Name (2) | 30 : GCLK_TC4, GCLK_TC5 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 70 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 59 : Overflow (OVF) 60,61 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 49 : TC5 Input (TC5 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 88 : Overflow (TC5_OVF) 89,90 : Match/Compare x, x=0,1 (TC5_MCx) |
| Peripheral Name | TC6 – Timer/Counter 6 |
| Base Address | 0x4300_1400 (Peripheral Bus D) |
| NVIC IRQ Index:Source | 113 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC6_APB, Disabled, APBDMASK.TC6 |
| GCLK Peripheral Channel Index:Clock Name (2) | 39 : GCLK_TC6, GCLK_TC7 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 101 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 62 : Overflow (OVF) 63,64 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 50 : TC6 Input (TC6 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 91 : Overflow (TC6_OVF) 92,93 : Match/Compare x, x=0,1 (TC6_MCx) |
| Peripheral Name | TC7 – Timer/Counter 7 |
| Base Address | 0x4300_1800 (Peripheral Bus D) |
| NVIC IRQ Index:Source | 114 : ERR , MC0, MC1, OVF |
| MCLK APB Clock (1) | CLK_TC7_APB, Disabled, APBDMASK.TC7 |
| GCLK Peripheral Channel Index:Clock Name (2) | 39 : GCLK_TC6, GCLK_TC7 |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 102 |
| DMA Trigger Index:Source (DMAC.CHCTRLAk,k=0,1,...31) | 65 : Overflow (OVF) 66,67 : Match/Compare (MC) |
| EVSYS Users (EVSYS.USERm) (3) | 51 : TC7 Input (TC7 EVU) (A,S,R) |
| EVSYS Generators (EVSYS.CHANNELn) | 94 : Overflow (TC7_OVF) 95,96 : Match/Compare x, x=0,1 (TC7_MCx) |
Note:
- Clock Name, Default State, Mask Field.
- See GCLK.PCHCTRLm Register, where m = Index.
- (A,S,R): A = Asynchronous path, S = Synchronous path, R = Resynchronized path.