This register is write-restricted and only writable if bit fields CCCR.CCE = 1 and CCCR.INIT =
1.
Configures the number of data bytes belonging to a Tx Buffer element. Data field sizes >8
bytes are intended for CAN FD operation only.
Name:
TXESC
Offset:
0xC8
Reset:
0x00000000
Property:
Write-restricted
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
TBDS[2:0]
Access
R/W
R/W
R/W
Reset
0
0
0
Bits 2:0 – TBDS[2:0] Tx Buffer Data Field
Size
In case the data length code
DLC of a Tx Buffer element is configured to a value higher than the Tx Buffer data field size
TXESC.TBDS, the bytes not defined by the Tx Buffer are transmitted as “0xCC” (padding
bytes).
Value
Name
Description
0x0
DATA8
8 byte data
field.
0x1
DATA12
12 byte data
field.
0x2
DATA16
16 byte data
field.
0x3
DATA20
20 byte data
field.
0x4
DATA24
24 byte data
field.
0x5
DATA32
32 byte data
field.
0x6
DATA48
48 byte data
field.
0x7
DATA64
64 byte data
field.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
