4.3 Pinout Specification
Ballout | Power Rail | I/O Type | Primary | Reset State | |
---|---|---|---|---|---|
Signal | Dir | Signal, Dir, Hiz, ST | |||
A1 | GND | Power | GND | — | — |
A2 | VDDIO | GPIO | TXRX1 | I/O | PIO, I, Hiz |
A3 | VDDIO | PLC | EMIT3 | O | O, Hiz |
A4 | VDDIO | PLC | EMIT2 | O | O, Hiz |
A5 | PVDDAMP | Power | VREGP | — | — |
A6 | PVDDAMP | Power | PVDDAMP | — | — |
A7 | PVDDAMP | PLC | OUT | O | — |
A8 | PVDDAMP | PLC | ASO1 | O | — |
A9 | PGND | Power | PGND | — | — |
B1 | VDDIO | AGC | AGC | O | O, ST0 |
B2 | GND | Power | GND | — | — |
B3 | VDDIO | PLC | EMIT3 | O | O, Hiz |
B4 | VDDIO | PLC | EMIT2 | O | O, Hiz |
B5 | PVDDAMP | Power | VREGN | — | — |
B6 | PVDDAMP | Power | PVDDAMP | — | — |
B7 | PVDDAMP | PLC | OUT | O | — |
B8 | PVDDAMP | PLC | ASO1 | O | — |
B9 | PGND | Power | PGND | — | — |
C1 | VDDCORE | Power | VDDCORE | — | — |
C2 | VDDCORE | Power | VDDCORE | — | — |
C3 | GND | Power | GND | — | — |
C4 | GND | Power | GND | — | — |
C5 | GND | Power | GND | — | — |
C6 | GNDAMP | Power | GNDAMP | — | — |
C7 | PVDDAMP | Power | VDDAMP | — | — |
C8 | PGND | Power | PGND | — | — |
C9 | PVDDAMP | PLC | ASO0 | O | — |
D1 | VDDIO | Power | VDDIO | — | — |
D2 | VDDIO | Power | VDDIO | — | — |
D3 | VDDIO | Power | VDDIO | — | — |
D4 | GND | Power | GND | — | — |
D5 | GND | Power | GND | — | — |
D6 | NC | Do not connect, reserved for test | |||
D7 | GND | Power | GND | — | — |
D8 | PVDDAMP | Power | VDDAMP | — | — |
D9 | PVDDAMP | PLC | ASO0 | O | — |
E1 | VDDIN_AN | PLC | VIN | I | I, Hiz |
E2 | AGND | Ground | AGND | — | — |
E3 | GND | Power | GND | — | — |
E4 | VDDIO | Power | VDDIO | — | — |
E5 | NC | Do not connect, reserved for test | |||
E6 | NC | Do not connect, reserved for test | |||
E7 | NC | Do not connect, reserved for test | |||
E8 | VDDIO | GPIO | ASI1 | O | — |
E9 | VDDIO | GPIO | ASI0 | O | — |
F1 | VDDIN_AN | Power | VDDIN_AN | — | — |
F2 | VDDIN_AN | Analog | VREFP | — | — |
F3 | AGND | Power | AGND | — | — |
F4 | GND | Power | GND | — | — |
F5 | VDDIO | Power | VDDIO | — | — |
F6 | VDDIO | Power | VDDIO | — | — |
F7 | VDDIO | GPIO | THW1 | O | — |
F8 | VDDIO | GPIO | NTHW0 | O | — |
F9 | VDDIO | GPIO | MISO | I/O | MISO, I, Hiz |
G1 | VDDIN_AN | Analog | VREFC | — | — |
G2 | VDDIN_AN | Analog | VREFN | — | — |
G3 | VDDIO | RST | NRST | I | I, Hiz |
G4 | VDDIO | Power | VDDIO | — | — |
G5 | GND | Power | GND | — | — |
G6 | VDDIO | Power | VDDIO | — | — |
G7 | VDDIO | GPIO | G1 | I | PIO, I, Hiz |
G8 | VDDIO | GPIO | CS | I/O | CS, I, Hiz |
G9 | VDDIO | GPIO | MOSI | I/O | MOSI, I, Hiz |
H1 | VDDIN_AN | Power | VDDIN_AN | — | — |
H2 | VDDIO | GPIO | STBY | I | — |
H3 | VDDIO | CLOCK | XIN | I | I, Hiz |
H4 | GND | Power | GND | — | — |
H5 | VDDCORE | Power | VDDCORE | — | — |
H6 | VDDIN | Power | VDDIN | — | — |
H7 | VDDIO | GPIO | THEN | I | PIO, I, Hiz |
H8 | VDDIO | GPIO | EXTIN | O | PIO, I, Hiz |
H9 | VDDIO | GPIO | SCK | I/O | SCK, I, Hiz |
J1 | GND | Power | GND | — | — |
J2 | VDDIO | GPIO | VZC | I | VZC/PIO, I, Hiz |
J3 | VDDIO | CLOCK | XOUT | O | O |
J4 | VDDPLL | Power | VDDPLL | — | — |
J5 | VDDCORE | Power | VDDCORE | — | — |
J6 | VDDIN | Power | VDDIN | — | — |
J7 | VDDIO | LDO | ENABLE | I | I, Hiz |
J8 | VDDIO | GPIO | TXEN | I | PIO, I, Hiz |
J9 | GND | Power | GND | — | — |
Note:
HiZ = High Impedance, ST = Set To