35.3.2.3 MUXTOP, MUXBOT, MUXWIP - Resistor Ladder Configuration

A resistor ladder and three connected multiplexers are associated with each op amp, as shown in Figure 35-1. These multiplexers are configured using the MUXTOP, MUXBOT and MUXWIP bit fields of the Op Amp n Resistor Ladder Multiplexer (OPAMP.OPnRESMUX) register. If the OPnRESMUX register is changed while the OPn output is enabled, a glitch will occur on the output signal due to the opening and closing of analog switches, and some time will elapse before the output settles to the new value.

The top of the resistor ladder is connected to a multiplexer that is controlled by the MUXTOP bit field. It can connect to the following signals:

OFF - Multiplexer off, no signal connected
OUT (OPnOUT) - OPn output
VDD - V_DD

The bottom of the resistor ladder is also connected to a multiplexer. This multiplexer is controlled by the MUXBOT bit field, and it can connect to the following signals:

OFF - Multiplexer off, no signal connected
INP (OPnINP) - Positive input pin for OPn
INN (OPnINN) - Negative input pin for OPn
DAC - DAC output (DAC and DAC output buffer must be enabled)
GND - Ground

OP0 has the following additional connection available via the MUXBOT bit field:

LINKOUT (OP2OUT) - OP2 output

OP1 has the following additional connection available via the MUXBOT bit field:

LINKOUT (OP0OUT) - OP0 output

OP2 has the following additional connection available via the MUXBOT bit field:

LINKOUT (OP1OUT) - OP1 output

A third multiplexer is connected to eight different wiper positions on the resistor ladder. This multiplexer is controlled by the MUXWIP bit field and allows the OPnWIP signal to be connected to any of eight different ratios of the upper (R2) and lower (R1) resistors:

WIP0 - R2/R1 = 1/15
WIP1 - R2/R1 = 1/7
WIP2 - R2/R1 = 1/3
WIP3 - R2/R1 = 1
WIP4 - R2/R1 = 5/3
WIP5 - R2/R1 = 3
WIP6 - R2/R1 = 7
WIP7 - R2/R1 = 15

Specifications for the resistor ladder can be found in the Electrical Characteristics section.