5 Hardware Revision History

5.1 Hardware Revision History and Known Issues

This user guide provides information about the latest available revision of the board. The following sections contain information about known issues, a revision history of older revisions, and how older revisions differ from the latest revision.

5.1.1 Identifying Product ID and Revision

There are two ways to find the revision and product identifier of the AVR32SD32 Curiosity Nano: The MPLAB® X IDE Kit Window or the sticker on the bottom of the PCB.

The Kit Window appears in MPLAB X IDE when connecting AVR32SD32 Curiosity Nano to the computer.

The first nine digits of the serial number, listed under kit information, contain the product identifier and revision.

Tip: If closed, the Kit Window can be opened in MPLAB X IDE through the menu bar Window > Kit Window.

The same information is found on the sticker on the bottom side of the PCB. The data matrix code on the sticker contains a string with the product identifier 02-01254, revision, and serial number.

The string in the data matrix code has the following format:

"nnnnnnnrrsssssssss"

n = product identifier

r = revision

s = serial number

5.1.2 Revision 2

Revision 2 is the initially released board revision. This revision does not include a demo application.

Known issues: The slew rate limiting for the U208 - MIC2008 is implemented incorrectly. The capacitor on the CSLEW pin is currently connected to GND, which causes the slew rate for VCC_VBUS to be approximately 50 V/ms. For the correct implementation, the capacitor is instead connected between the VIN and CSLEW pins to achieve the intended slew rate limiting.

The 32.768 kHz crystal load is not optimal and may produce frequencies beyond the ±20 ppm specified in the crystal’s specifications. A workaround is to replace the two load capacitors, C104 and C105, with 3.9pF NP0 (C0G) capacitors.

5.1.3 Revision 3

Known issue: The slew rate limiting for the U208 - MIC2008 is implemented incorrectly. The capacitor on the CSLEW pin is currently connected to GND, which causes the slew rate for VCC_VBUS to be approximately 50 V/ms. For the correct implementation, the capacitor is instead connected between the VIN and CSLEW pins to achieve the intended slew rate limiting.