ATtiny1614

5.1 Multiplexed Signals

Table 5-1. PORT Function Multiplexing
SOIC 14-Pin	Pin Name ^(1,2)	Other/Special	ADC0	ADC1	PTC⁽⁴⁾	AC0	AC1	AC2	DAC0	USART0	SPI0	TWI0	TCA0	TCBn	TCD0	CCL
10	PA0	RESET/ UPDI	AIN0													LUT0-IN0
11	PA1		AIN1							TxD⁽³⁾	MOSI	SDA⁽³⁾				LUT0-IN1
12	PA2	EVOUT0	AIN2							RxD⁽³⁾	MISO	SCL⁽³⁾				LUT0-IN2
13	PA3	EXTCLK	AIN3							XCK⁽³⁾	SCK		WO3	TCB1 WO
14	GND
1	VDD
2	PA4		AIN4	AIN0	X0/Y0					XDIR⁽³⁾	SS		WO4		WOA	LUT0-OUT
3	PA5	VREFA	AIN5	AIN1	X1/Y1	OUT	AINN0						WO5	TCB0 WO	WOB
4	PA6		AIN6	AIN2	X2/Y2	AINN0	AINP1	AINP0	OUT
5	PA7		AIN7	AIN3	X3/Y3	AINP0	AINP0	AINN0								LUT1-OUT
6	PB3	TOSC1					OUT			RxD			WO0⁽³⁾
7	PB2	TOSC2, EVOUT1						OUT		TxD			WO2
8	PB1		AIN10		X4/Y4	AINP2				XCK		SDA	WO1
9	PB0		AIN11		X5/Y5		AINP2	AINP1		XDIR		SCL	WO0

Note:

Pin names are of type Pxn, with x being the PORT instance (A, B) and n the pin number. Notation for signals is PORTx_PINn. All pins can be used as event input.
All pins can be used for external interrupt, where pins Px2 and Px6 of each port have full asynchronous detection.
Alternate pin positions. For selecting the alternate positions, refer to the PORTMUX documentation.
Every PTC line can be configured as X- or Y-line.

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