37.17 ADC

Table 37-23. ADC Accuracy Specifications
Operating Conditions:
  • VDD = 3.0V
  • TA = 25ºC
SymbolDescriptionMin.Typ. ✝Max.UnitConditions
NRResolution12bit
EINLIntegral nonlinearity error-10.11LSb
EDNLDifferential nonlinearity error(1)-10.11LSb
EOFFOffset error1.335LSb
EGAINGain error-51.55LSb
EABSAbsolute errorLSb
VADCREFADC reference voltage 1.024VDDV
VAINFull-scale rangeGNDVADCREFV
ZAINRecommended impedance of analog voltage source10
RVREFAADC voltage reference ladder impedance(2)50

Data in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are for design guidance only and are not tested.

Note:
  1. The ADC conversion result never decreases with an increase in the input and has no missing codes.
  2. This is the impedance seen by the VREFA pin when the external reference is selected.
Table 37-24. ADC Conversion Timing Specifications
SymbolDescriptionMin.Typ. ✝Max.UnitConditions
TCLK_ADC *ADC clock period0.58μs
tCNVConversion time 13.5TCLK_ADC + 2TCLK_PER
tACQAcquisition time2TCLK_ADCμs
fADC *Sample rate8130ksps
tSSampling time2TCLK_ADC
tSENSE *Delay for changing MUXPOS to TEMP40μs
tADC_INIT *Initialization time6μs

Data in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are for design guidance only and are not tested.

* These parameters are characterized but not tested in production.