2 Peripheral Overview
The following table shows the peripheral overview of the entire AVR® DA(S) family. Further documentation describes only the AVR32DA28/32/48(S) devices.
| Feature |
AVR128DA28(S) AVR64DA28(S) AVR32DA28(S) |
AVR128DA32(S) AVR64DA32(S) AVR32DA32(S) |
AVR128DA48(S) AVR64DA48(S) AVR32DA48(S) |
AVR128DA64(S) AVR64DA64(S) |
|---|---|---|---|---|
| Pins |
28 |
32 |
48 |
64 |
| Max. Frequency (MHz) | 24 | 24 | 24 | 24 |
| 16-bit Timer/Counter type A (TCA) | 1 | 1 | 2 | 2 |
| 16-bit Timer/Counter type B (TCB) | 3 | 3 | 4 | 5 |
| 12-bit Timer/Counter type D (TCD) | 1 | 1 | 1 | 1 |
| Real-Time Counter (RTC) | 1 | 1 | 1 | 1 |
| USART | 3 | 3 | 5 | 6 |
| SPI | 2 | 2 | 2 | 2 |
| TWI/I2C | 1(1) | 2(1) | 2(1) | 2(1) |
| 12-bit Differential ADC (channels) | 1 (10) | 1 (14) | 1 (18) | 1 (22) |
| 10-bit DA(S)C (outputs) | 1(1) | 1(1) | 1(1) | 1(1) |
| Analog Comparator (AC) | 3 | 3 | 3 | 3 |
| Zero-Cross Detectors (ZCD) | 1 | 1 | 2 | 3 |
| Peripheral Touch Controller (PTC) (self-cap/mutual cap channels) | 1 (18/81) | 1 (22/121) | 1 (32/256) | 1 (46/529) |
| Configurable Custom Logic (CCL) | 1(4) | 1(4) | 1(6) | 1(6) |
| Watchdog Timer (WDT) | 1 | 1 | 1 | 1 |
| Event System channels | 8 | 8 | 10 | 10 |
| General Purpose I/O(2) | 23(2) | 27(2) | 41(2) | 55(2) |
| PORT | PA[7:0], PC[3:0], PD[7:0], PF[6,1,0] | PA[7:0], PC[3:0], PD[7:0],PF[6:0] | PA[7:0], PB[5:0], PC[7:0], PD[7:0], PE[3:0], PF[6:0] | PA[7:0], PB[7:0], PC[7:0], PD[7:0], PE[7:0], PF[6:0], PG[7:0] |
| External Interrupts | 23 | 27 | 41 | 55 |
| CRCSCAN | 1 | 1 | 1 | 1 |
| Unified Program and Debug Interface (UPDI) | 1 | 1 | 1 | 1 |
Note:
- The TWI/I2C can operate simultaneously as host and client on different pins.
- PF6/RESET pin is input-only.