38.5 I/O Pins

Figure 38-68. Fall Time vs. VDD (PORTCTRL.SRL = 0x00)
Figure 38-69. Fall Time vs. VDD (PORTCTRL.SRL = 0x01)
Figure 38-70. Rise Time vs. VDD (PORTCTRL.SRL = 0x00)
Figure 38-71. Rise Time vs. VDD (PORTCTRL.SRL = 0x01)
Figure 38-72. Input Pin with Schmitt Trigger - Maximum VIL vs. VDD
Figure 38-73. Input Pin with Schmitt Trigger - Minimum VIH vs. VDD
Figure 38-74. Input Pin with Schmitt Trigger - Hysteresis vs. VDD
Figure 38-75. Input Pin with I2C Trigger - Maximum VIL vs. VDD
Figure 38-76. Input Pin with I2C Trigger - Minimum VIH vs. VDD
Figure 38-77. Input Pin SMBus - Maximum VIL vs. VDD
Figure 38-78. Input Pin SMBus - Minimum VIH vs. VDD
Figure 38-79. Reset Pin VIL vs. VDD
Figure 38-80. Reset Pin VIH vs. VDD
Figure 38-81. Weak Pull-Up Current vs. VDD
Figure 38-82. Output Pin - Maximum VOL vs. Current, VDD = 1.8V
Figure 38-83. Output Pin - Minimum VOH vs. Current, VDD = 1.8V
Figure 38-84. Output Pin - Maximum VOL vs. Current, VDD = 3.0V
Figure 38-85. Output Pin - Minimum VOH vs. Current, VDD = 3.0V
Figure 38-86. Output Pin - Maximum VOL vs. Current, VDD = 5.5V
Figure 38-87. Output Pin - Minimum VOH vs. Current, VDD = 5.5V