28.10.6 TxRST

Name:	TxRST
Address:	0x11E,0x124

Timer External Reset Signal Selection Register


Bit	7	6	5	4	3	2	1	0
				RSEL[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 4:0 – RSEL[4:0] External Reset Source Selection

Table 28-4. External Reset Sources
RSEL	Reset Source
RSEL	TMR2	TMR4
`11111 - 10001`	Reserved
`10000`	U2TX_Edge (Positive/Negative)
`01111`	U2RX_Edge (Positive/Negative)
`01110`	U1TX_Edge (Positive/Negative)
`01101`	U1RX_Edge (Positive/Negative)
`01100`	CLC4_OUT
`01011`	CLC3_OUT
`01010`	CLC2_OUT
`01001`	CLC1_OUT
`01000`	PWM2S1P2_OUT
`00111`	PWM2S1P1_OUT
`00110`	PWM1S1P2_OUT
`00101`	PWM1S1P1_OUT
`00100`	CCP2_OUT
`00011`	CCP1_OUT
`00010`	TMR4_Postscaler_OUT	Reserved
`00001`	Reserved	TMR2_Postscaler_OUT
`00000`	Pin selected by T2INPPS	Pin selected by T4INPPS