Silicon Issue Summary
Module | Feature | Item No. | Issue Summary | Affected Revisions | ||||
---|---|---|---|---|---|---|---|---|
A0 | A1 | A2 | A3 | A5 | ||||
Capture/Compare/PWM (CCP) | PWM mode | 1.1.1 | Duty cycle values are incorrect | X | X | X | X | X |
Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) | Transmit mode | 1.2.1 | Possible duplicate byte transmitted | X | X | X | X | X |
Host Synchronous Serial Port (MSSP) | Start and Stop interrupt function | 1.3.1 | A race condition can cause the Start and/or Stop flags to be set when I2C is enabled | X | X | X | X | X |
In-Circuit Serial Programming™ | Low-Voltage Programming | 1.4.1 | Low-Voltage Programming is not possible when VDD is below BORV while BOR is enabled | X | X | X | X | X |
Watchdog Timer (WDT) | Watchdog Timer Reset | 1.5.1 | WDT reset may not work properly while device is not in Sleep | X | X | |||
Configuration Words (CONFIG) | Sleep | 1.6.1 | Waking from Sleep may cause unexpected behavior. | X | X | X | ||
NVM - Non-Volatile Memory | NVM Programming | 1.7.1 | NVM programming does not work below 2.7V. | X | X | X | X | |
Timer1 | Timer1 Gate Source | 1.8.1 | Changing the Timer1 Gate Source may cause unexpected interrupts. | X | X | X | X | X |
PFM - Program Flash Memory | Back to Back Writes | 1.9.1 | Repetitive writes may cause write/erase failures. | X | X | X | X | X |
Note:
Only those issues indicated in the last column
apply to the current silicon revision.
|