39.5 Power Consumption

The values in this section are measured values of power consumption under the following conditions, except where noted:

  • Operating conditions
    • VVDDIN = 3.3 V
  • Wake up time from sleep mode is measured from the edge of the wakeup signal to the execution of the first instruction fetched in flash.
  • Oscillators
    • XOSC (crystal oscillator) stopped
    • XOSC32K (32 kHz crystal oscillator) running with external 32kHz crystal
    • DFLL48M using XOSC32K as reference and running at 48 MHz
  • Clocks
    • DFLL48M used as main clock source, except otherwise specified
    • CPU, AHB clocks undivided
    • APBA clock divided by 4
    • APBB and APBC bridges off
  • The following AHB module clocks are running: NVMCTRL, APBA bridge
    • All other AHB clocks stopped
  • The following peripheral clocks running: PM, SYSCTRL, RTC
    • All other peripheral clocks stopped
  • I/Os are inactive with internal pull-up
  • CPU is running on flash with 1 wait states
  • Cache enabled
  • BOD33 disabled
  • Table 39-7. Current Consumption (Device Variant A, B, C and L. Silicon Revision F)
    ModeConditionsTATyp.Max.Units
    ACTIVECPU running a While(1) algorithm125°C3.754.12mA
    CPU running a While(1) algorithm VDDIN=1.8V,
CPU is running on Flash with 3 wait states125°C3.774.13
    CPU running a While(1) algorithm, CPU is
running on Flash with 3 wait states with
GCLKIN as reference125°C62*freq + 22862*freq + 302μA
(with freq in MHz)
    CPU running a Fibonacci algorithm125°C4.855.29mA
    CPU running a Fibonacci algorithm
VDDIN=1.8V, CPU is running on flash with 3
wait states125°C4.875.29
    CPU running a Fibonacci algorithm, CPU is
running on Flash with 3 wait states with
GCLKIN as reference125°C88*freq + 42488*freq + 486μA
(with freq in MHz)
    CPU running a CoreMark algorithm125°C6.707.30mA
    CPU running a CoreMark algorithm
VDDIN=1.8V, CPU is running on flash with 3
wait states125°C5.986.41
    CPU running a CoreMark algorithm, CPU is
running on Flash with 3 wait states with
GCLKIN as reference125°C108*freq + 426108*freq + 492μA
(with freq in MHz)
    IDLE0Default operating conditions125°C2.402.69mA
    IDLE1Default operating conditions125°C1.792.05
    IDLE2Default operating conditions125°C1.501.76

    STANDBY

    (Device Variant B, Die Revision E)

    		XOSC32K running
, RTC running at 1kHz(1)125°C348.0850.0μA
    XOSC32K and RTC stopped(1)125°C346.0848.0

    STANDBY

    (Device Variant B and C, Die Revision F)

    		XOSC32K running
, RTC running at 1kHz(1)125°C294.0782.0μA
    XOSC32K and RTC stopped(1)125°C292.0780.0
    Note:
    1. Measurements were done with SYSCTRL->VREG.bit.RUNSTDBY = 1
    Table 39-8. Current Consumption (Silicon Revision G)
    Modeconditions TaVccTyp.Max.Units
    ACTIVECPU running a While 1 algorithm125°C3,3V3.54.0mA
    1,8V3.54.0
    CPU running a While 1 algorithm, with GCLKIN as reference3,3V57*Freq+39555*Freq+1076
    CPU running a Fibonacci algorithm3,3V4.55.0
    1,8V4.55.0
    CPU running a Fibonacci algorithm, with GCLKIN as reference3,3V75*Freq+39772*Freq+1076
    CPU running a CoreMark algorithm3,3V5.15.7
    1,8V4.95.5
    CPU running a CoreMark algorithm, with GCLKIN as reference3,3V88*Freq+39985*Freq+1075
    IDLE0 3,3V2.02.5
    IDLE1 3,3V1.41.9
    IDLE2 3,3V1.11.7
    STANDBYXOSC32K running, RTC running at 1kHz RTC running at 1kHz (1)3,3V294.0782.0µA
    XOSC32K and RTC stopped (1) 3,3V292.0780.0
    Note:
    1. Measurements done with VREG.bit.RUNSTDBY = 1.
    Table 39-9. Wake-up Time (SAMD21)
    ModeConditionsTAMin.Typ.Max.Units
    IDLE0OSC8M used as main clock source, Cache disabled125°C3.94.04.1μs
    IDLE1OSC8M used as main clock source, Cache disabled125°C13.514.916.4
    IDLE2OSC8M used as main clock source, Cache disabled125°C14.415.817.2
    STANDBYOSC8M used as main clock source, Cache disabled125°C19.220.622.1
Figure 39-1. Measurement Schematic