30.6.6 Synchronization

Due to asynchronicity between the main clock domain and the peripheral clock domains, some registers need to be synchronized when written or read.

The following bits are synchronized when written:

  • Software Reset bit in the Control A register (CTRLA.SWRST)
  • Enable bit in the Control A register (CTRLA.ENABLE)

Required write-synchronization is denoted by the "Write-Synchronized" property in the register description.

The following registers are synchronized when written:

  • Control B Clear register (CTRLBCLR)
  • Control B Set register (CTRLBSET)
  • Control C register (CTRLC)
  • Count Value register (COUNT)
  • Period Value register (PER)
  • Compare/Capture Value registers (CCx)

Required write-synchronization is denoted by the "Write-Synchronized" property in the register description.

The following registers are synchronized when read:

  • Control B Clear register (CTRLBCLR)
  • Control B Set register (CTRLBSET)
  • Control C register (CTRLC)
  • Count Value register (COUNT)
  • Period Value register (PER)
  • Compare/Capture Value registers (CCx)

Required read-synchronization is denoted by the "Read-Synchronized" property in the register description.