37.16.5 I2S Timing

Figure 37-24. I2S Timing Host Mode
Figure 37-25. I2S Timing Client Mode
Figure 37-26. I2S Timing PDM2 Mode
Table 37-71. I2S Timing Characteristics and Requirements (Device Variant A)
NameDescriptionModeVDD=1.8V VDD=3.3V Units
Min.Typ.MaxMin.Typ.Max.
tM_MCKORI2S MCK rise time(3)Host mode / Capacitive load CL = 15 pF9.24.7ns
tM_MCKOFI2S MCK fall time(3)Host mode / Capacitive load CL = 15 pF11.55.3ns
dM_MCKOI2S MCK duty cycleHost mode45.45045.450%
dM_MCKII2S MCK duty cycleHost mode, pin is input (1b)5050%
tM_SCKORI2S SCK rise time(3)Host mode / Capacitive load CL = 15 pF94.6ns
tM_SCKOFI2S SCK fall time(3)Host mode / Capacitive load CL = 15 pF9.74.5ns
dM_SCKOI2S SCK duty cycleHost mode45.65045.650%
fM_SCKO,1/tM_SCKOI2S SCK frequencyHost mode,Supposing external device response delay is 30ns89.5MHz
fS_SCKI,1/tS_SCKII2S SCK frequencyClient mode,Supposing external device response delay is 30ns14.414.8MHz
dS_SCKOI2S SCK duty cycleClient mode5050%
tM_FSOVFS valid timeHost mode4.14ns
tM_FSOHFS hold timeHost mode-0.9-0.9ns
tS_FSISFS setup timeClient mode2.31.5ns
tS_FSIHFS hold timeClient mode00ns
tM_SDISData input setup timeHost mode34.724.5ns
tM_SDIHData input hold timeHost mode-8.2-8.2ns
tS_SDISData input setup timeClient mode4.63.9ns
tS_SDIHData input hold timeClient mode1.21.2ns
tM_SDOVData output valid timeHost transmitter5.64.8ns
tM_SDOHData output hold timeHost transmitter-0.5-0.5ns
tS_SDOVData output valid timeClient transmitter36.225.9ns
tS_SDOHData output hold timeClient transmitter3625.7ns
tPDM2LSData input setup timeHost mode PDM2 Left34.724.5ns
tPDM2LHData input hold timeHost mode PDM2 Left-8.2-8.2ns
tPDM2RSData input setup timeHost mode PDM2 Right30.520.9ns
tPDM2RHData input hold timeHost mode PDM2 Right-6.7-6.7ns
Table 37-72. I2S Timing Characteristics and Requirements (Device Variant B, C and D)
NameDescriptionModeVDD=1.8VVDD=3.3VUnits
Min.Typ.Max.Min.Typ.Max.
tM_MCKORI2S MCK rise time(3)Host mode / Capacitive load CL = 15 pF9.24.7ns
tM_MCKOFI2S MCK fall time(3)Host mode / Capacitive load CL = 15 pF11.65.4ns
dM_MCKOI2S MCK duty cycleHost mode47.15047.350%
dM_MCKII2S MCK duty cycleHost mode, pin is input (1b)5050%
tM_SCKORI2S SCK rise time(3)Host mode / Capacitive load CL = 15 pF94.6ns
tM_SCKOFI2S SCK fall time(3)Host mode / Capacitive load CL = 15 pF9.74.6ns
dM_SCKOI2S SCK duty cycleHost mode475047.250%
fM_SCKO, 1/tM_SCKOI2S SCK frequencyHost mode, Supposing external device response delay is 30ns7.89.2MHz
fS_SCKI, 1/tS_SCKII2S SCK frequencyClient mode, Supposing external device response delay is 30ns12.813MHz
dS_SCKOI2S SCK duty cycleClient mode5050%
tM_FSOVFS valid timeHost mode2.41.9ns
tM_FSOHFS hold timeHost mode-0.1-0.1ns
tS_FSISFS setup timeClient mode65.3ns
tS_FSIHFS hold timeClient mode00ns
tM_SDISData input setup timeHost mode3625.9ns
tM_SDIHData input hold timeHost mode-8.2-8.2ns
tS_SDISData input setup timeClient mode9.18.3ns
tS_SDIHData input hold timeClient mode3.83.7ns
tM_SDOVData output valid timeHost transmitter2.5 1.9ns
tM_SDOHData output hold timeHost transmitter-0.1-0.1ns
tS_SDOVData output valid timeClient transmitter29.8 19.7ns
tS_SDOHData output hold timeClient transmitter29.118.9ns
tPDM2LSData input setup timeHost mode PDM2 Left35.525.3ns
tPDM2LHData input hold timeHost mode PDM2 Left-8.2-8.2ns
tPDM2RSData input setup timeHost mode PDM2 Right30.621.1ns
tPDM2RHData input hold timeHost mode PDM2 Right-7-7ns
Note:
  1. All timing characteristics given for 15pF capacitive load.
  2. These values are based on simulations and not covered by test limits in production.
  3. See I/O Pin Characteristics