27.5.1 I/O Lines
In order to use the SERCOM’s I/O lines, the I/O pins must be configured using the IO Pin Controller (PORT).
When the SERCOM is configured for SPI operation, the SERCOM controls the direction and value of the I/O pins according to the table below. PORT Control bit PINCFGn.DRVSTR is still effective for the SERCOM output pins. PORT Control bit PINCFGn.PULLEN is still effective on the SERCOM input pins, but is limited to the enabling/disabling of a pull down only (it is not possible to enable/disable a pull up). If the receiver is disabled, the data input pin can be used for other purposes. In Host mode, the SPI Select line (SS) is hardware controlled when the Host SPI Select Enable bit in the Control B register (CTRLB.MSSEN) is '1'.
| Pin | Host SPI | Client SPI |
|---|---|---|
| MOSI | Output | Input |
| MISO | Input | Output |
| SCK | Output | Input |
| SS | Output (CTRLB.MSSEN=1) | Input |
The combined configuration of PORT, the Data In Pinout and the Data Out Pinout bit groups in the Control A register (CTRLA.DIPO and CTRLA.DOPO) define the physical position of the SPI signals in the table above.