40.7 Power Consumption
The values provided in the following table are measured values of power consumption, which are valid under the following conditions, except where noted:
- Operating conditions:
- VDDIN = 3.3V
- Wake up time from Sleep mode is measured from the edge of the wakeup signal to the execution of the first instruction fetched in Flash.
- Oscillators:
- XOSC (Crystal scillator) stopped
- XOSC32K (32 kHz Crystal Oscillator) running with external 32 kHz crystal
- DFLL48M using XOSC32K as reference and running at 48 MHz
- Clocks:
- DFLL48M used as main clock source, except otherwise specified.
- CPU, AHB clocks undivided
- APBA clock divided by 4
- APBB and APBC bridges off
- The following AHB module clocks are running: NVMCTRL, APBA bridge
- All other AHB clocks stopped
- The following peripheral clocks running: PM, SYSCTRL, RTC
- All other peripheral clocks stopped
- I/Os are inactive with internal pull-up
- CPU is running on Flash with 1 wait states
- NVMCTRL cache enabled
- BOD33 disabled
| Mode | Conditions | TA | VCC | Typ. | Max. | Units |
|---|---|---|---|---|---|---|
| ACTIVE | CPU running a While 1 algorithm | 25°C | 3.3V | 3.4 | 3.9 | mA |
| 125°C | 3.3V | 3.8 | 6.1 | |||
|
CPU running a While 1 algorithm, with GCLKIN as reference | 25°C | 3.3V | 60*Freq+136 | 81*Freq+126 |
µA (with freq. in MHz) | |
| 125°C | 3.3V | 62*Freq+498 | 70*Freq+1780 | |||
| CPU running a Fibonacci algorithm | 25°C | 3.3V | 4.6 | 5.0 | mA | |
| 125°C | 3.3V | 5.0 | 7.3 | |||
|
CPU running a Fibonacci algorithm, with GCLKIN as reference | 25°C | 3.3V | 92*Freq+113 | 99*Freq+141 |
µA (with freq. in MHz) | |
| 125°C | 3.3V | 92*Freq+503 | 91*Freq+1794 | |||
| CPU running a CoreMark algorithm | 25°C | 3.3V | 6.3 | 6.8 | mA | |
| 125°C | 3.3V | 6.7 | 8.6 | |||
|
CPU running a CoreMark algorithm, with GCLKIN as reference | 25°C | 3.3V | 118*Freq+116 | 131*Freq+141 |
µA (with freq. in MHz) | |
| 125°C | 3.3V | 121*Freq+506 | 122*Freq+1792 | |||
| IDLE0 | Default operating conditions | 25°C | 3.3V | 2.0 | 2.2 | mA |
| 125°C | 3.3V | 2.4 | 4.0 | |||
| IDLE1 | Default operating conditions | 25°C | 3.3V | 1.5 | 1.6 | |
| 125°C | 3.3V | 1.8 | 3.3 | |||
| IDLE2 | Default operating conditions | 25°C | 3.3V | 1.2 | 1.3 | |
| 125°C | 3.3V | 1.5 | 3.0 | |||
| STANDBY (1) |
XOSC32K running RTC running at 1kHz | 25°C | 3.3V | 4.2 | 13.3 | µA |
| 125°C (1) | 3.3V | 430.6 | 1128.0 | |||
| XOSC32K and RTC stopped | 25°C | 3.3V | 2.9 | 12.2 | ||
| 125°C(1) | 3.3V | 428.6 | 1126.0 |
Note:
- Measurements done with VREG.bit.RUNSTDBY = 1.
| Mode | Conditions | TA | Vcc | Typ. | Max. | Units |
|---|---|---|---|---|---|---|
| ACTIVE | CPU running a While 1 algorithm | 25°C | 3.3V | 2.7 | 3.1 | mA |
| 125°C | 3.3V | 3.0 | 3.5 | |||
|
CPU running a While 1 algorithm, with GCLKIN as reference | 25°C | 3.3V | 52*Freq+108 | 60*Freq+124 |
µA (with freq. in MHz) | |
| 125°C | 3.3V | 53*Freq+377 | 48*Freq+1104 | |||
| CPU running a Fibonacci algorithm | 25°C | 3.3V | 3.3 | 3.6 | mA | |
| 125°C | 3.3V | 3.6 | 4.1 | |||
|
CPU running a Fibonacci algorithm, with GCLKIN as reference | 25°C | 3.3V | 66*Freq+108 | 71*Freq+126 |
µA (with freq. in MHz) | |
| 125°C | 3.3V | 66*Freq+375 | 62*Freq+1113 | |||
| CPU running a CoreMark algorithm | 25°C | 3.3V | 4.5 | 5.0 | mA | |
| 125°C | 3.3V | 4.9 | 5.4 | |||
|
CPU running a CoreMark algorithm, with GCLKIN as reference | 25°C | 3.3V | 90*Freq+109 | 97*Freq+125 |
µA (with freq. in MHz) | |
| 125°C | 3.3V | 92*Freq+376 | 89*Freq+1103 | |||
| IDLE0 | Default operating conditions | 25°C | 3.3V | 1.5 | 1.6 | mA |
| 125°C | 3.3V | 1.8 | 2.4 | |||
| IDLE1 | Default operating conditions | 25°C | 3.3V | 1.0 | 1.0 | |
| 125°C | 3.3V | 1.2 | 1.8 | |||
| IDLE2 | Default operating conditions | 25°C | 3.3V | 0.8 | 0.8 | |
| 125°C | 3.3V | 1.0 | 1.6 | |||
| STANDBY (1) |
XOSC32K running RTC running at 1kHz | 25°C | 3,3V | 61.0 | 83.0 | µA |
| 125°C | 3,3V | 294.0 | 782.0 | |||
| XOSC32K and RTC stopped | 25°C | 3,3V | 60.0 | 82.0 | ||
| 125°C | 3,3V | 292.0 | 780.0 |
Note:
- Measurements done with VREG.bit.RUNSTDBY = 1.
| Mode | Conditions | Ta | Vcc | Typ. | Max | Units | |
|---|---|---|---|---|---|---|---|
| ACTIVE | CPU running a While 1 algorithm | 25°C | 3.3V | 2.8 | 3.1 | mA | |
| 125°C | 3.3V | 3.5 | 4.1 | ||||
| CPU running a While 1 algorithm, with GCLKIN as reference | 25°C | 3.3V | 56*Freq+116 | 60*Freq+131 | µA (with freq in MHz) | ||
| 125°C | 3.3V | 57*Freq+395 | 55*Freq+1232 | ||||
| CPU running a Fibonacci algorithm | 25°C | 3.3V | 3.7 | 4.1 | mA | ||
| 125°C | 3.3V | 4.5 | 5.1 | ||||
| CPU running a Fibonacci algorithm, with GCLKIN as reference | 25°C | 3.3V | 74*Freq+116 | 80*Freq+125 | µA (with freq in MHz) | ||
| 125°C | 3.3V | 75*Freq+397 | 72*Freq+1231 | ||||
| CPU running a CoreMark algorithm | 25°C | 3.3V | 4.2 | 4.7 | mA | ||
| 125°C | 3.3V | 5.1 | 5.9 | ||||
| CPU running a CoreMark algorithm, with GCLKIN as reference | 25°C | 3.3V | 86*Freq+117 | 92*Freq+127 | µA (with freq in MHz) | ||
| 125°C | 3.3V | 88*Freq+399 | 85*Freq+1230 | ||||
| IDLE0 | 25°C | 3.3V | 1.5 | 1.7 | mA | ||
| 125°C | 3.3V | 2.0 | 2.7 | ||||
| IDLE1 | 25°C | 3.3V | 1.0 | 1.1 | |||
| 125°C | 3.3V | 1.4 | 2.1 | ||||
| IDLE2 | 25°C | 3.3V | 0.8 | 0.9 | |||
| 125°C | 3.3V | 1.1 | 1.8 | ||||
| STANDBY (1) | XOSC32K running RTC running at 1kHz | 25°C | 3,3V | 61.0 | 83.0 | µA | |
| 125°C | 3,3V | 294.0 | 782.0 | ||||
| XOSC32K and RTC stopped | 25°C | 3,3V | 60.0 | 82.0 | |||
| 125°C | 3,3V | 292.0 | 780.0 | ||||
Note:
- Measurements done with VREG.bit.RUNSTDBY = 1.
| Mode | Conditions | TA | Min. | Typ. | Max. | Units |
|---|---|---|---|---|---|---|
| IDLE0 | OSC8M used as main clock source, Cache disabled | 125°C | - | 4 | - | µs |
| IDLE1 | OSC8M used as main clock source, Cache disabled | - | 14.9 | - | ||
| IDLE2 | OSC8M used as main clock source, Cache disabled | - | 15.8 | - | ||
| STANDBY | OSC8M used as main clock source, Cache disabled | - | 20.6 | - |
For Measurement Schematics, refer to Power Supply Schematic.