16.8.10 APBC Mask
Name: | APBCMASK |
Offset: | 0x20 |
Reset: | 0x00010000 |
Property: | Write-Protected |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
TCC3 | |||||||||
Access | R | R | R | R | R | R | R | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
AC1 | I2S | PTC | DAC | AC | ADC | ||||
Access | R | R | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
TC7 | TC6 | TC5 | TC4 | TC3 | TCC2 | TCC1 | TCC0 | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | SERCOM1 | SERCOM0 | EVSYS | PAC2 | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 24 – TCC3 TCC3 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TCC3 is stopped |
1 | The APBC clock for the TCC3 is enabled |
Bit 21 – AC1 AC1 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the AC1 is stopped |
1 | The APBC clock for the AC1 is enabled |
Bit 20 – I2S I2S APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the I2S is stopped |
1 | The APBC clock for the I2S is enabled |
Bit 19 – PTC PTC APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the PTC is stopped |
1 | The APBC clock for the PTC is enabled |
Bit 18 – DAC DAC APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the DAC is stopped |
1 | The APBC clock for the DAC is enabled |
Bit 17 – AC AC APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the AC is stopped |
1 | The APBC clock for the AC is enabled |
Bit 16 – ADC ADC APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the ADC is stopped |
1 | The APBC clock for the ADC is enabled |
Bit 15 – TC7 TC7 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TC7 is stopped |
1 | The APBC clock for the TC7 is enabled |
Bit 14 – TC6 TC6 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TC6 is stopped |
1 | The APBC clock for the TC6 is enabled |
Bit 13 – TC5 TC5 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TC5 is stopped |
1 | The APBC clock for the TC5 is enabled |
Bit 12 – TC4 TC4 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TC4 is stopped |
1 | The APBC clock for the TC4 is enabled |
Bit 11 – TC3 TC3 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TC3 is stopped |
1 | The APBC clock for the TC3 is enabled |
Bit 10 – TCC2 TCC2 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TCC2 is stopped |
1 | The APBC clock for the TCC2 is enabled |
Bit 9 – TCC1 TCC1 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TCC1 is stopped |
1 | The APBC clock for the TCC1 is enabled |
Bit 8 – TCC0 TCC0 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TCC0 is stopped |
1 | The APBC clock for the TCC0 is enabled |
Bit 7 – SERCOM5 SERCOM5 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOM5 is stopped |
1 | The APBC clock for the SERCOM5 is enabled |
Bit 6 – SERCOM4 SERCOM4 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOM4 is stopped |
1 | The APBC clock for the SERCOM4 is enabled |
Bit 5 – SERCOM3 SERCOM3 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOM3 is stopped |
1 | The APBC clock for the SERCOM3 is enabled |
Bit 4 – SERCOM2 SERCOM2 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOM2 is stopped |
1 | The APBC clock for the SERCOM2 is enabled |
Bit 3 – SERCOM1 SERCOM1 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOM1 is stopped |
1 | The APBC clock for the SERCOM1 is enabled |
Bit 2 – SERCOM0 SERCOM0 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOM0 is stopped |
1 | The APBC clock for the SERCOM0 is enabled |
Bit 1 – EVSYS EVSYS APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the EVSYS is stopped |
1 | The APBC clock for the EVSYS is enabled |
Bit 0 – PAC2 PAC2 APB Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the PAC2 is stopped |
1 | The APBC clock for the PAC2 is enabled |