40.9.5 Analog Comparator Characteristics

Table 40-34. Electrical and Timing (Device Variant A)
SymbolParameterConditionsMin.Typ.Max.Units
Positive input voltage range -0-VDDANAV
Negative input voltage range -0-VDDANA
OffsetHysteresis = 0, Fast mode-26026mV
Hysteresis = 0, Low power mode-43043mV
HysteresisHysteresis = 1, Fast mode850102mV
Hysteresis = 1, Low power mode144085mV
Propagation delay

Changes for VACM=VDDANA/2

100mV overdrive, Fast mode

-60126ns

Changes for VACM=VDDANA/2

100mV overdrive, Low power mode

-225402ns
tSTARTUPStartup time

Enable to ready delay

Fast mode

-12µs

Enable to ready delay

Low power mode

-1220µs
VSCALEINL(3) --1.60.81.6LSB
DNL(3) --0.950.30.95LSB
Offset Error (1)(2) --0.20.31.04LSB
Gain Error (1)(2) --0.890.22LSB
Table 40-35. Electrical and Timing (Device Variant B and D)
SymbolParameterConditionsMin.Typ.Max.
Positive input voltage range -0-VDDANA
Negative input voltage range -0-VDDANA
OffsetHysteresis = 0, Fast mode-26026
Hysteresis = 0, Low power mode-28028
HysteresisHysteresis = 1, Fast mode850102
Hysteresis = 1, Low power mode144075
Propagation delay

Changes for VACM=VDDANA/2

100mV overdrive, Fast mode

-90180

Changes for VACM=VDDANA/2

100mV overdrive, Low power mode

-282534

tSTARTUP

Startup time

Enable to ready delay

Fast mode

-13

Enable to ready delay

Low power mode

-1423
VSCALEINL(3) --1.60.751.6
DNL(3) --0.950.250.95
Offset Error (1)(2) --0.20.261.04
Gain Error (1)(2) --0.890.2152
Note:
  1. According to the standard equation V(X)=VLSB*(X+1); VLSB=VDDANA/64
  2. Data computed with the Best Fit method.
  3. Data computed using histogram.