38.6.3 Analog-to-Digital Converter (ADC) Characteristics

Table 38-10. Operating Conditions
SymbolParameterConditionsMin.Typ.Max.Units
VDDANAPower supply voltageT > 85°C2.7-3.6V
RESResolution-8-12bits
fCLK_ADCADC Clock frequency-30-2100kHz
Sample rate(1)Single shot5-300ksps
Free running5-350ksps
Sampling time(1)-250--ns
Sampling time with DAC as input(2)-3--µs
Sampling time with Temp sens as input(2)-10--µs
Sampling time with Bandgap as input(2)-10--µs
Conversion time(1)1x Gain6--cycles
VREFVoltage reference range

(VREFA or VREFB)

-1.0-VDDANA-0.6V
INT1VInternal 1V reference (2,4)--1.0-V
INTVCC0Internal ratiometric reference 0(2)--VDDANA/1.48-V
INTVCC0

Voltage Error

Internal ratiometric reference 0(2) error2.0V < VDDANA<3.63V-1.0-+1.0%
INTVCC1Internal ratiometric reference 1(2)VDDANA>2.0V-VDDANA/2-V
INTVCC1

Voltage Error

Internal ratiometric reference 1(2) error2.0V < VDDANA<3.63V-1.0-+1.0%
Conversion range(1)Differential mode-VREF/GAIN-+VREF/GAINV
Single-ended mode0.0-+VREF/GAINV
CSAMPLESampling capacitance(2)--3.5-pF
RSAMPLEInput channel source resistance(2)---3.5
IDDDC supply current(1)fCLK_ADC = 2.1-MHz(3)-1.251.83mA
  1. These values are based on characterization. These values are not covered by test limits in production.
  2. These values are based on simulation. These values are not covered by test limits in production or characterization.
  3. In this condition and for a sample rate of 350ksps, a conversion takes 6 clock cycles of the ADC clock (conditions: 1X gain, 12-bit resolution, differential mode, free-running).
  4. It is the buffered internal reference of 1.0V derived from the internal 1.1V bandgap reference.
Table 38-11. Differential Mode
SymbolParameterConditionsMin.Typ.Max.Units
ENOBEffective Number Of BitsWith gain compensation-10.510.8bits
TUETotal Unadjusted Error1x Gain1.52.713LSB
INLIntegral Non Linearity1x Gain0.91.34LSB
DNLDifferential Non Linearity1x Gain+/-0.3+/-0.5+/-0.95LSB
GEGain ErrorExt. Ref 1x-10.0-1.3+10.0mV
VREF = VDDANA/1.48-20.0-10.0+10.0mV
VREF = INT1V-20.0+2+20.0mV
Gain Accuracy(5)Ext. Ref. 0.5x+/-0.02+/-0.05+/-0.2%
Ext. Ref. 2x to 16x+/-0.01+/-0.03+/-0.5%
OEOffset ErrorExt. Ref. 1x-8.0-1.0+8.0mV
VREF = VDDANA/1.48-8.0-0.60+8.0mV
VREF = INT1V-6.0-1.0+6.0mV
SFDRSpurious Free Dynamic Range1x Gain

FCLK_ADC = 2.1 MHz

FIN = 40 kHz

AIN = 95% FSR

65.071.576.0dB
SINADSignal-to-Noise and Distortion58.065.067.0dB
SNRSignal-to-Noise Ratio60.066.068.6dB
THDTotal Harmonic Distortion-75.0-71.0-67.0dB
Noise RMST = 25°C0.61.01.6mV
  1. Maximum numbers are based on characterization and not tested in production, and valid for 5% to 95% of the input voltage range.
  2. Dynamic parameter numbers are based on characterization and not tested in production.
  3. Respect the input common mode voltage through the following equations (where, VCM_IN is the Input channel common mode voltage):
    1. If |VIN| > VREF/4
      • VCM_IN < 0.95*VDDANA + VREF/4 – 0.75V
      • VCM_IN > VREF/4 -0.05*VDDANA -0.1V
    2. If |VIN| < VREF/4
      • VCM_IN < 1.2*VDDANA - 0.75V
      • VCM_IN > 0.2*VDDANA - 0.1V
  4. The ADC channels on pins PA08, PA09, PA10, PA11 are powered from the VDDIO power supply. The ADC performance of these pins will not be the same as all the other ADC channels on pins powered from the VDDANA power supply.
  5. The gain accuracy represents the gain error expressed in percent. Gain accuracy (%) = (Gain Error in V x 100) / (2*Vref/GAIN)
Table 38-12. Single-Ended Mode
SymbolParameterConditionsMin.Typ.Max.Units
ENOBEffective Number of BitsWith gain compensation-9.710.1Bits
TUETotal Unadjusted Error1x gain-7.930.0LSB
INLIntegral Non-Linearity1x gain1.42.65.0LSB
DNLDifferential Non-Linearity1x gain+/-0.6+/-0.7+/-0.95LSB
GEGain ErrorExt. Ref. 1x-5.00.65.0mV
Gain Accuracy(4)Ext. Ref. 0.5x+/-0.1+/-0.37+/-0.5%
Ext. Ref. 2x to 16X+/-0.01+/-0.1+/-0.2%
OEOffset ErrorExt. Ref. 1x-5.00.610.0mV
SFDRSpurious Free Dynamic Range1x Gain

FCLK_ADC = 2.1 MHz

FIN = 40 kHz

AIN = 95% FSR

63.068.070.1dB
SINADSignal-to-Noise and Distortion55.060.162.5dB
SNRSignal-to-Noise Ratio54.061.064.0dB
THDTotal Harmonic Distortion-70.0-68.0-65.0dB
Noise RMST = 25°C-1.0-mV
  1. Maximum numbers are based on characterization and not tested in production, and for 5% to 95% of the input voltage range.
  2. Respect the input common mode voltage through the following equations (where VCM_IN is the Input channel common mode voltage) for all VIN:
    • VCM_IN < 0.7*VDDANA + VREF/4 – 0.75V
    • VCM_IN > VREF/4 – 0.3*VDDANA - 0.1V
  3. The ADC channels on pins PA08, PA09, PA10, PA11 are powered from the VDDIO power supply. The ADC performance of these pins will not be the same as all the other ADC channels on pins powered from the VDDANA power supply.
  4. The gain accuracy represents the gain error expressed in percent. Gain accuracy (%) = (Gain Error in V x 100) / (Vref/GAIN)