24.8.4 Channel Status
| Name: | CHSTATUS |
| Offset: | 0x0C |
| Reset: | 0x000F00FF |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| CHBUSY11 | CHBUSY10 | CHBUSY9 | CHBUSY8 | ||||||
| Access | R | R | R | R | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| USRRDY11 | USRRDY10 | USRRDY9 | USRRDY8 | ||||||
| Access | R | R | R | R | |||||
| Reset | 1 | 1 | 1 | 1 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CHBUSY7 | CHBUSY6 | CHBUSY5 | CHBUSY4 | CHBUSY3 | CHBUSY2 | CHBUSY1 | CHBUSY0 | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| USRRDY7 | USRRDY6 | USRRDY5 | USRRDY4 | USRRDY3 | USRRDY2 | USRRDY1 | USRRDY0 | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 24, 25, 26, 27 – CHBUSYn Channel n Busy
This bit is cleared when channel n is idle
This bit is set if an event on channel n has not been handled by all event users connected to channel n.
Bits 16, 17, 18, 19 – USRRDYn Channel n User Ready
This bit is cleared when at least one of the event users connected to the channel is not ready.
This bit is set when all event users connected to channel n are ready to handle incoming events on channel n.
Bits 8, 9, 10, 11, 12, 13, 14, 15 – CHBUSYn Channel n Busy
This bit is cleared when channel n is idle
This bit is set if an event on channel n has not been handled by all event users connected to channel n.
Bits 0, 1, 2, 3, 4, 5, 6, 7 – USRRDYn Channel n User Ready
This bit is cleared when at least one of the event users connected to the channel is not ready.
This bit is set when all event users connected to channel n are ready to handle incoming events on channel n.