Figure 44-91. ADC DNL vs ADC Code
(Single-Ended Mode, VDD = 3.0V, TAD = 1
μs)
Figure 44-92. ADC DNL vs ADC Code
(Single-Ended Mode, VREF+ = VDD = 3.0V,
TAD = 1 μs)
Figure 44-93. ADC DNL vs
TAD (Single-Ended Mode, VREF+ = VDD
= 3.0V, TA = 125°C, CPON = 'b11)
Figure 44-94. ADC DNL vs
VREF+ (Single-Ended Mode, TAD = 1 μs,
VDD = 3.0V, TA = 125°C, CPON =
'b11)
Figure 44-95. ADC INL vs ADC Code
(Single-Ended Mode, VDD = 3.0V, TAD = 1
μs)
Figure 44-96. ADC INL vs ADC Code
(Single-Ended Mode, VREF+ = VDD = 3.0V,
TAD = 1 μs)
Figure 44-97. ADC INL vs
TAD (Single-Ended Mode, VREF+ = VDD
= 3.0V, TA = 125°C, CPON = 'b11)
Figure 44-98. ADC INL vs
VREF+ (Single-Ended Mode, TAD = 1 μs,
VDD = 3.0V, TA = 125°C, CPON =
'b11)
Figure 44-99. ADC Gain Error vs
TAD (Single-Ended Mode, VREF+ = VDD
= 3.0V, CPON = 'b11)
Figure 44-100. ADC Gain Error vs
VREF+ (Single-Ended Mode, TAD = 1 μs,
VDD = 3.0V, CPON = 'b11)
Figure 44-101. ADC Offset Error vs TAD (Single-Ended Mode,
VREF+ = VDD = 3.0V, CPON =
'b11)
Figure 44-102. ADC Offset Error vs
VREF+ (Single-Ended Mode TAD = 1 μs,
VDD = 3.0V, CPON = 'b11)
DS40002339G
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