36.7 Register Summary: USB Common Registers

For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.

OffsetNameBit Pos.76543210
0x00CTRLA7:0      ENABLESWRST
15:8     REFCLKSELIDOVENIDVAL
23:16        
31:24        
0x04CTRLB7:0BLANK[7:0]
15:8BLANK[15:8]
23:16    BLANK[19:16]
31:24        
0x08CTRLC7:0   T1MSEN    
15:8        
23:16        
31:24        
0x0CINTENCLR7:0  PHYRDYT1MSDMAUSBRESUMEWAKEUP
15:8        
23:16        
31:24        
0x10INTENSET7:0  PHYRDYT1MSDMAUSBRESUMEWAKEUP
15:8        
23:16        
31:24        
0x14INTFLAG7:0  PHYRDYT1MSDMAUSBRESUMEWAKEUP
15:8        
23:16        
31:24        
0x18STATUS7:0     VREGRDYPHYONPHYRDY
15:8        
23:16        
31:24        
0x1CSYNCBUSY7:0     T1MSENENABLESWRST
15:8        
23:16        
31:24        

0x20

...

0x1000

Reserved         
0x1001POWR7:0ISOUPDSOFTCONNHSENHSMODERESETRESUMESUSPMODESUSPEN
0x1002INTRTX7:0EP6TXIFEP5TXIFEP4TXIFEP3TXIFEP2TXIFEP1TXIFEP0TXIFEP0IF
15:8        
0x1004INTRRX7:0EP6RXIFEP5RXIFEP4RXIFEP3RXIFEP2RXIFEP1RXIFEP0RXIF 
15:8        
0x1006INTRTXE7:0EP6TXENEP5TXENEP4TXENEP3TXENEP2TXENEP1TXENEP0TXENEP0EN
15:8        
0x1008INTRRXE7:0EP6RXENEP5RXENEP4RXENEP3RXENEP2RXENEP1RXENEP0RXEN 
15:8        
0x100AINTRUSB7:0VBUSERRSESSREQDISCONCONNSOFRESETRESUMESUSPEND
0x100BINTRUSBE7:0VBUSERRENSESSREQENDISCONENCONNENSOFENRESETENRESUMEENSUSPENDEN
0x100CFRAME7:0FRMNUM[7:0]
15:8     FRMNUM[10:8]
0x100EINDEX7:0    SELEP[3:0]
0x100FTESTMODE7:0FORCEHOSTFIFOACCESSFORCEFSFORCEHSTESTPACKETTESTKTESTJTESTSE0NAK
0x1010TXMAXP7:0TXMAXP[7:0]
15:8MULT[4:0]TXMAXP[10:8]

0x1012

...

0x1013

Reserved         
0x1014RXMAXP7:0RXMAXP[7:0]
15:8MULT[4:0]RXMAXP[10:8]

0x1016

...

0x101E

Reserved         
0x101FFIFOSIZE7:0RXFIFOSIZE[3:0]TXFIFOSIZE[3:0]
0x1020FIFO07:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x1024FIFO17:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x1028FIFO27:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x102CFIFO37:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x1030FIFO47:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x1034FIFO57:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x1038FIFO67:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]
0x103CFIFO77:0DATA[7:0]
15:8DATA[15:8]
23:16DATA[23:16]
31:24DATA[31:24]

0x1040

...

0x105F

Reserved         
0x1060DEVCTL7:0BDEVICEFSDEVLSDEVVBUS[1:0]HOSTMODEHOSTREQSESSION
0x1061MISC7:0      TXEDMARXEDMA
0x1062TXFIFOSZ7:0   DPBFIFOSZ[3:0]
0x1063RXFIFOSZ7:0   DPBFIFOSZ[3:0]
0x1064TXFIFOADD7:0ADDR[7:0]
15:8   ADDR[12:8]
0x1066RXFIFOADD7:0ADDR[7:0]
15:8   ADDR[12:8]

0x1068

...

0x1077

Reserved         
0x1078EPIINFO7:0RXENDPOINTS[3:0]TXENDPOINTS[3:0]

0x1079

Reserved         
0x107ALINKINFO7:0WTCON[3:0]WTID[3:0]
0x107BVPLEN7:0VPLEN[7:0]
0x107CHSEOF17:0HSEOF1[7:0]
0x107DFSEOF17:0FSEOF1[7:0]
0x107ELSEOF17:0LSEOF1[7:0]
0x107FSOFTRST7:0      NRSTXNRST

0x1080

...

0x11FF

Reserved         
0x1200DMAINTR7:0DMA7IFDMA6IFDMA5IFDMA4IFDMA3IFDMA2IFDMA1IFDMA0IF
15:8        
23:16        
31:24        
0x1204DMA0CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x1208DMA0ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x120CDMA0NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x120EDMA1CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x1212DMA1ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x1216DMA1NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x1218DMA2CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x121CDMA2ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x1220DMA2NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x1222DMA3CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x1226DMA3ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x122ADMA3NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x122CDMA4CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x1230DMA4ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x1234DMA4NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x1236DMA5CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x123ADMA5ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x123EDMA5NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x1240DMA6CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x1244DMA6ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x1248DMA6NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]
0x124ADMA7CTRL7:0DMAEP[3:0]DMAIEDMAMODEDMADIRDMAEN
15:8     DMABRSTM[1:0]DMAERR
23:16        
31:24        
0x124EDMA7ADDR7:0DMAADDR[7:0]
15:8DMAADDR[15:8]
23:16DMAADDR[23:16]
31:24DMAADDR[31:24]
0x1252DMA7NCOUNT7:0DMACOUNT[7:0]
15:8DMACOUNT[15:8]
23:16DMACOUNT[23:16]
31:24DMACOUNT[31:24]

0x1256

...

0x133F

Reserved         
0x1340RXDPKTBUFDIS7:0EP6RXDEP5RXDEP4RXDEP3RXDEP2RXDEP1RXDEP0RXD 
15:8        
0x1342TXDPKTBUFDIS7:0EP6TXDEP5TXDEP4TXDEP3TXDEP2TXDEP1TXDEP0TXD 
15:8        
0x1344CTUCH7:0TUCH[7:0]
15:8TUCH[15:8]
0x1346CTHHSRTN7:0THHSRTN[7:0]
15:8THHSRTN[15:8]
0x1348CTHSBT7:0    HSTMEOUTADD[3:0]
15:8        

0x134A

...

0x135F

Reserved         
0x1360LPMATTR7:0HIRD[3:0]LNKSTATE[3:0]
15:8ENDPOINT[3:0]   RMTWAK
0x1362LPMCNTRL7:0   LPMNAKLPMEN[1:0]LPMRESLPMXMT
0x1363LPMINTREN7:0  LPMERRENLPMRESENLPMNCENLPMACKENLPMNYENLPMSTEN
0x1364LPMINTR7:0  LPMERRLPMRESLPMNCLPMACKLPMNYLPMST

0x1365

...

0x14FF

Reserved         
0x1500PHY007:0RXPHSSEL[2:0]SLEWRATE[1:0]PREEMP[2:0]
15:8        
23:16        
31:24        
0x1504PHY047:0SQUELCH[2:0]HIZReservedTXPHSSEL[2:0]
15:8        
23:16        
31:24        
0x1508PHY087:0       SQUELCH
15:8        
23:16        
31:24        
0x150CPHY0C7:0TUNE[2:0]     
15:8        
23:16        
31:24        
0x1510PHY107:0DRVTUNE[2:0]TUNE[4:0]
15:8        
23:16        
31:24        
0x1514PHY147:0ODT  BYPSSSQUELCH COMPBYPSS[2:0]
15:8        
23:16        
31:24        
0x1518PHY187:0      ODT[1:0]
15:8        
23:16        
31:24        
0x151CPHY1C7:0FSLSDIFF     ODTBYPASS 
15:8        
23:16        
31:24        
0x1520PHY207:0HSSLEW[1:0]      
15:8        
23:16        
31:24        
0x1524PHY247:0HSDRIVST[1:0]HSPREEMPST[2:0]PREEMPHENOTGPDNHSSLEW
15:8        
23:16        
31:24        
0x1528PHY287:0HSDRVCOMP[2:0]DISCONDET[3:0]HSDRIVST
15:8        
23:16        
31:24        

0x152C

...

0x1543

Reserved         
0x1544PHY447:0FRCSESSEND   FRCVBUSVALDIGDBGPLLDAMP 
15:8        
23:16        
31:24        
0x1548PHY487:0SESSENDTUNE[2:0]  VBUSCHRGEFRCBSESSVALFRCASESSVAL
15:8        
23:16        
31:24        
0x154CPHY4C7:0BSESSVALIDTUNE[1:0]   VBUSVALTUNE[2:0]
15:8        
23:16        
31:24        
0x1550PHY507:0COMPCURREF[2:0] ASESSVALIDTUNE[2:0]BSESSVALIDTUNE
15:8        
23:16        
31:24