51.36 SD/MMC Host Controller (SDHC) Electrical Specifications

Figure 51-36. SD/SDIO/MMC SDHC Module AC Timing Diagram

Table 51-50. SD Host Controller AC Timing Specifications ⁽¹⁾
AC CHARACTERISTICS			Standard Operating Conditions: VDDREG=VDDIO=AVDD 2.7V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
SD_1	fGCLK_SDHCx_SLOW	Common SDHC slow input clock frequency	—	—	FCLK_31	MHz	—
SD_3	fGCLK_SDHCx_CORE	SDHCx input clock frequency	—	—	FCLK_33	MHz	—
SD/SDIO Default Speed Mode
SD_5	tSDCK	Clock Frequency	—	—	25	MHz	—
SD_7	tDUTY	Duty Cycle	—	50	—	%	—
SD_9	tHIGH	Clock High Time	500/tSDCK	—	—	ns	—
SD_11	tLOW	Clock Low Time	500/tSDCK	—	—	ns	—
SD_13	tRISE	Clock Rise Time	—	—	DI_29	ns	See parameter in I/O Specifications
SD_15	tFALL	Clock Fall Time	—	—	DI_31	ns	See parameter in I/O Specifications
SD_17	tIN_SETUP	Input Setup Time	3	—	—	ns	—
SD_19	tIN_HOLD	Input Hold Time	0	—	—	ns	—
SD_21	tOUT_DLY	Output Delay Time	—	—	7	ns	VDDIOx = 3.3V, CLOAD = 30 pF(MAX)
SD_23	tOUT_HOLD	Output HOLD Time	1	—	—	ns	VDDIOx = 3.3V, CLOAD = 30 pF(MAX)
SD/SDIO High Speed Mode
SD_25	tSDCK	Clock Frequency	—	—	52	MHz	—
SD_27	tDUTY	Duty Cycle	—	50	—	%	—
SD_29	tHIGH	Clock High Time	500/tSDCK	—	—	ns	—
SD_31	tLOW	Clock Low Time	500/tSDCK	—	—	ns	—
SD_29	tRISE	Clock Rise Time	—	—	DI_29	ns	See parameter in I/O Specifications
SD_31	tFALL	Clock Fall Time	—	—	DI_31	ns	See parameter in I/O Specifications
SD_33	tIN_SETUP	Input Setup Time	3	—	—	ns	—
SD_35	tIN_HOLD	Input Hold Time	0	—	—	ns	—
SD_37	tOUT_DLY	Output Delay Time	—	—	7	ns	VDDIOx = 3.3V, CLOAD = 30 pF(MAX)
SD_39	tOUT_HOLD	Output HOLD Time	0	—	—	ns	VDDIOx = 3.3V, CLOAD = 30 pF(MAX)
Note: All output pins with 30pF load.