51.14 Maximum Clock Frequencies

Table 51-18. Maximum Clock Frequencies AC Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDDREG=VDDIO=AVDD 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMaxUnits
FCLK_1FCYMCU clock freq120MHz
FCLK_3fAHBAHB clock freq120MHz
FCLK_5fAPBnAPBA, APBB, APBC clock freq120MHz
FCLK_6fGCLKGEN[0]GCLK clock freq output120MHz
fGCLKGEN[1:7]200MHz
fGCLKGEN[8:11]100MHz
FCLK_7fGCLK_PLLPLL reference clock freq48MHz
FCLK_11fGCLK_DFLL48M_REFDFLL 48M reference clock freq1MHz
FCLK_13fGCLK_EICEIC input clock freq100MHz
FCLK_15fGCLK_FREQM_MSRFREQM Measure Clock Frequency200MHz
FCLK_17fGCLK_FREQM_REFFREQM Reference Clock Frequency100MHz
FCLK_19fGCLK_EVSYS_CHANNELxEVSYS channel x input clock freq100MHz
FCLK_21fGCLK_SERCOMx_SLOWCommon SERCOM slow input clock freq32kHz
FCLK_23fGCLK_SERCOMx_CORE, x = 1 to 7SERCOMx input clock freq100MHz
fGCLK_SERCOM0_CORESERCOM0 input clock freq160MHz
FCLK_25fGCLK_CANxCAN input clock freq100MHz
FCLK_27fGCLK_USBFSUSB FS input clock freq48MHz
FCLK_29fGCLK_IxSIxS input clock freq100MHz
FCLK_31fGCLK_SDHCx_SLOWCommon SDHC slow input clock freq32kHz
FCLK_33fGCLK_SDHCx_CORESDHCx input clock freq106MHz
FCLK_35fGCLK_TCCxTCCx input clock freq200MHz
FCLK_42fGCLK_PDECPDEC input clock freq200MHz
FCLK_43fGCLK_CCLCCL input clock freq100MHz
FCLK_45fGCLK_GCLKINxExternal GCLKx input clock freq50MHz
FCLK_47fGCLK_CM33_TRACECM33 Trace input clock freq50MHz
FCLK_49fGCLK_ACAnalog comparator peripheral module clock freq100MHz
FCLK_51fGCLK_ADCxADCx input clock freq100MHz
FCLK_55fGCLK_PTCPTC input clock freq50MHz
FCLK_61fGCLK_ETHEthernet input clock freq25MHz
FCLK_62fGCLK_ETH_TSU (1)Ethernet TSU input clock freq< fAHBMHz
FCLK_73fGCLK_QSPIQSPI internal GCLK freq160MHz
Note:
  1. fGCK_ETH_TSU must be lower than fAHB (FCLK_3) for reliable operation.