42.5 Peripheral Dependencies
| Base Address | MCLK AHBx/APBx Clock Enable Mask Bit | GCLK Peripheral Channel
Clock Name:Register | PAC Peripheral Identifier
(PAC.WRCTRL.PERIDx) | EVSYS Users
(EVSYS.USERm) | EVSYS Generator
(EVSYS.CHANNELn.EVGENx) | Power Domain |
|---|---|---|---|---|---|---|
| 0x4501_A000 | MCLK.CLKMSK3[13] | 37 : GCLK_CCL | 49 | 93-96 : LUTIN_x | 114-117 : LUTOUT_x | VDDREG |