42.7 Register Summary

OffsetNameBit Pos.76543210
0x00CTRL7:0 RUNSTDBY    ENABLESWRST

0x01

...

0x03

Reserved         
0x04SEQCTRL07:0    SEQSEL[3:0]
0x05SEQCTRL17:0    SEQSEL[3:0]

0x06

...

0x07

Reserved         
0x08LUTCTRL07:0EDGESEL FILTSEL[1:0]  ENABLE 
15:8INSEL1[3:0]INSEL0[3:0]
23:16 LUTEOLUTEIINVEIINSEL2[3:0]
31:24TRUTH[7:0]
0x0CLUTCTRL17:0EDGESEL FILTSEL[1:0]  ENABLE 
15:8INSEL1[3:0]INSEL0[3:0]
23:16 LUTEOLUTEIINVEIINSEL2[3:0]
31:24TRUTH[7:0]
0x10LUTCTRL27:0EDGESEL FILTSEL[1:0]  ENABLE 
15:8INSEL1[3:0]INSEL0[3:0]
23:16 LUTEOLUTEIINVEIINSEL2[3:0]
31:24TRUTH[7:0]
0x14LUTCTRL37:0EDGESEL FILTSEL[1:0]  ENABLE 
15:8INSEL1[3:0]INSEL0[3:0]
23:16 LUTEOLUTEIINVEIINSEL2[3:0]
31:24TRUTH[7:0]