51.15 External Oscillator (XOSC) Electrical Specifications

Table 51-19. External XTAL and Clock AC Electrical Specifications (1)
AC CHARACTERISTICSStandard Operating Conditions: VDDREG=VDDIO=AVDD 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions 1
XOSC_1FOSC_XOSCXOSC Crystal Frequency448MHzXOSCCTRLn.XTALEN=1 XIN, XOUT Primary Osc
XOSC_1ATOSCTOSC = 1/FOSC_XOSC20.83250nsSee parameter XOSC1 for FOSC_XOSC value
XOSC_2XOSC_ST (2)XOSC Crystal Start-up Time 1300000 (4)TOSCCrystal stabilization time only not Oscillator Ready XOSCCTRLA.AGC = 1 FOSC = 48MHz (2)
XOSC_3CXINXOSC XIN parasitic pin capacitance5.1pF
XOSC_5CXOUTXOSC XOUT parasitic pin capacitance5.7pF
XOSC_11CLOAD (3)Crystal load capacitance FOSC = 4MHz20pFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 500Ω
XOSC_13Crystal load capacitance FOSC = 8MHzpFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 500Ω
XOSC_15Crystal load capacitance FOSC = 12MHzpFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 250Ω
XOSC_17Crystal load capacitance FOSC = 16MHz18pFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 170Ω
XOSC_19Crystal load capacitance FOSC = 24MHzpFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 80Ω
XOSC_21Crystal load capacitance FOSC = 32MHz12pFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 90Ω
XOSC_23Crystal load capacitance FOSC = 48MHz8pFXOSCCTRLA.AGC = 1 Crystal ESR ≤ 90Ω
XOSC_33DLEVELMCU Crystal Osc Power Drive Level100µWXOSCCTRLA.AGC = 1
XOSC_35FOSC_XCLKExt Clock Oscillator Input Freq (XIN pin)448MHzXOSCCTRLA.XTALEN = 0
XOSC_37XCLK_DCExt Clock Oscillator (XIN) Duty Cycle405060%XOSCCTRLA.XTALEN = 0
XOSC_39XCLK_FSTPrimary XIN Clock Fail Safe Time-out Period4*1/(DFLL_1/2^XOSCCTRLA.CFDPRESC)µs
Note:
  1. VDDIOx = AVDD = 3.3V.
  2. This is for guidance only. A major component of crystal start-up time is based on the 2nd party crystal MFG parasitics that are outside the scope of this specification. If this is a major concern the customer would need to characterize this based on their design choices.
  3. CRYSTAL LOAD CAPACITOR CALCULATION GIVEN:
    • Standard PCB trace capacitance = 1.5 pF per 12.5 mm (0.5 inches) (i.e. PCB STD TRACE W = 0.175 mm, H = 36 μm, T = 113 μm)
    • XTAL PCB capacitance typical therefore ~= 2.5 pF for a tight PCB XTAL layout
    • For CXIN and CXOUT within 4 pF of each other, Assume CXTAL_EFF = ((CXIN+CXOUT) / 2)
      Note: Averaging CXIN and CXOUT will effect final calculated CLOAD value by less than 0.25 pF.
    Equation 1: MFG CLOAD Spec = {( [CXIN + C1] * [CXOUT + C2] ) / [CXIN + C1 + C2 + CXOUT] } + estimated oscillator PCB stray capacitance
    • Assuming C1 = C2 and CXIN ~= CXOUT, the formula can be further simplified and restated to solve for C1 and C2 by:

    Equation 2: (i.e. Simplified Equation #1) C1 = C2 = ((2 * MFG CLOAD spec) - CXTAL_EFF - (2 * PCB capacitance))

    EXAMPLE ONLY:

    • XTAL Mfg CLOAD Data Sheet Spec = 12 pF
    • PCB XTAL trace Capacitance = 2.5 pF
    • CXIN pin = 6.5 pF, CXOUT pin = 4.5 pF therefore CXTAL_EFF = ((CXIN+CXOUT) / 2) CXTAL_EFF = ((6.5 + 4.5)/2) = 5.5 pF

    C1 = C2 = ((2 * MFG CLOAD spec) - CXTAL_EFF - (2 * PCB capacitance))

    C1 = C2 = (24 - 5.5 - (2 * 2.5))

    C1 = C2 = 13.5 pF (Always rounded down)

    C1 = C2 = 13 pF (i.e. for hypothetical example crystal external load capacitors)

    User C1 = C2 = 13 pF CLOAD(max) spec

  4. Start up time selected in XOSCCTRL.STARTUP should be ≥ to this spec.
Figure 51-11. XTAL